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Message-Id: <D775OTRW5PI5.331IHP40POB5Z@cknow.org>
Date: Mon, 20 Jan 2025 20:43:49 +0100
From: "Diederik de Haas" <didi.debian@...ow.org>
To: "Benjamin Gaignard" <benjamin.gaignard@...labora.com>,
<nicolas.dufresne@...labora.com>, <p.zabel@...gutronix.de>,
<mchehab@...nel.org>
Cc: <linux-media@...r.kernel.org>, <linux-rockchip@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3] media: verisilicon: HEVC: Initialize start_bit field
On Mon Jan 20, 2025 at 4:35 PM CET, Benjamin Gaignard wrote:
> Always set start_bit field to 0, if not it could lead to corrupted frames
> specially when decoding VP9 bitstreams at the same time since VP9 driver
> set it for its own purpose.
>
> Fixes: cb5dd5a0fa51 ("media: hantro: Introduce G2/HEVC decoder")
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@...labora.com>
> Tested-by: Nicolas Dufresne <nicolas.dufresne@...labora.com>
In the mail that contained the Tested-by tag there was also a
Reviewed-by tag (from Nicolas) further down below.
(sorry about the other mail; sth went wrong)
> ---
> drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c b/drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
> index 85a44143b378..0e212198dd65 100644
> --- a/drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
> +++ b/drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
> @@ -518,6 +518,7 @@ static void set_buffers(struct hantro_ctx *ctx)
> hantro_reg_write(vpu, &g2_stream_len, src_len);
> hantro_reg_write(vpu, &g2_strm_buffer_len, src_buf_len);
> hantro_reg_write(vpu, &g2_strm_start_offset, 0);
> + hantro_reg_write(vpu, &g2_start_bit, 0);
> hantro_reg_write(vpu, &g2_write_mvs_e, 1);
>
> hantro_write_addr(vpu, G2_TILE_SIZES_ADDR, ctx->hevc_dec.tile_sizes.dma);
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