linux-kernel - Re: [PATCH v2 2/6] KVM: x86: selftests: Define AMD PMU CPUID leaves

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <gsntsepd2z4q.fsf@coltonlewis-kvm.c.googlers.com>
Date: Mon, 20 Jan 2025 17:06:45 +0000
From: Colton Lewis <coltonlewis@...gle.com>
To: Sean Christopherson <seanjc@...gle.com>
Cc: kvm@...r.kernel.org, mizhang@...gle.com, ljr.kernel@...il.com, 
	jmattson@...gle.com, aaronlewis@...gle.com, pbonzini@...hat.com, 
	shuah@...nel.org, linux-kselftest@...r.kernel.org, 
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 2/6] KVM: x86: selftests: Define AMD PMU CPUID leaves

Noted about the changelog and the ordering. No objections for how you
want to apply it.

Sean Christopherson <seanjc@...gle.com> writes:

> The shortlog is misleading.  It's the *leaves* that are being defined,  
> it's the
> features and properties.

> On Wed, Sep 18, 2024, Colton Lewis wrote:
>> This defined the CPUID calls to determine what extensions and
>> properties are available.

> This is not a coherent changelog.

>> AMD reference manual names listed below.

>> * PerfCtrExtCore (six core counters instead of four)
>> * PerfCtrExtNB (four counters for northbridge events)
>> * PerfCtrExtL2I (four counters for L2 cache events)
>> * PerfMonV2 (support for registers to control multiple
>>    counters with a single register write)
>> * LbrAndPmcFreeze (support for freezing last branch recorded stack on
>>    performance counter overflow)
>> * NumPerfCtrCore (number of core counters)
>> * NumPerfCtrNB (number of northbridge counters)

>> Signed-off-by: Colton Lewis <coltonlewis@...gle.com>
>> ---
>>   tools/testing/selftests/kvm/include/x86_64/processor.h | 7 +++++++
>>   1 file changed, 7 insertions(+)

>> diff --git a/tools/testing/selftests/kvm/include/x86_64/processor.h  
>> b/tools/testing/selftests/kvm/include/x86_64/processor.h
>> index a0c1440017bb..44ddfc4c1673 100644
>> --- a/tools/testing/selftests/kvm/include/x86_64/processor.h
>> +++ b/tools/testing/selftests/kvm/include/x86_64/processor.h
>> @@ -183,6 +183,9 @@ struct kvm_x86_cpu_feature {
>>   #define	X86_FEATURE_GBPAGES		KVM_X86_CPU_FEATURE(0x80000001, 0, EDX, 26)
>>   #define	X86_FEATURE_RDTSCP		KVM_X86_CPU_FEATURE(0x80000001, 0, EDX, 27)
>>   #define	X86_FEATURE_LM			KVM_X86_CPU_FEATURE(0x80000001, 0, EDX, 29)
>> +#define	X86_FEATURE_PERF_CTR_EXT_CORE	KVM_X86_CPU_FEATURE(0x80000001,  
>> 0, ECX, 23)

> This ordering is "broken", and confused me for quite some time.  These  
> new features
> are in ECX, but they're landed after features for EDX.  To make matters  
> worse,
> there's an existing feature, SVM, defined for ECX.

> TL;DR: please be more careful about the ordering, don't just drop stuff  
> at the
> end.

>> +#define	X86_FEATURE_PERF_CTR_EXT_NB	KVM_X86_CPU_FEATURE(0x80000001, 0,  
>> ECX, 24)
>> +#define	X86_FEATURE_PERF_CTR_EXT_L2I	KVM_X86_CPU_FEATURE(0x80000001, 0,  
>> ECX, 28)

> To make life easier for developers, I think it makes sense to use the  
> kernel's
> names (when the kernel also defines a feature), and adjust the property  
> names to
> follow suit.

> If there are no objections, I'll apply this as:

> --
> Author:     Colton Lewis <coltonlewis@...gle.com>
> AuthorDate: Wed Sep 18 20:53:15 2024 +0000
> Commit:     Sean Christopherson <seanjc@...gle.com>
> CommitDate: Wed Jan 8 09:55:57 2025 -0800

>      KVM: selftests: Add defines for AMD PMU CPUID features and properties

>      Add macros for AMD's PMU related CPUID features.  To make it easier to
>      cross reference selftest code with KVM/kernel code, use the same macro
>      names as the kernel for the features.

>      For reference, the AMD APM defines the features/properties as:

>        * PerfCtrExtCore (six core counters instead of four)
>        * PerfCtrExtNB (four counters for northbridge events)
>        * PerfCtrExtL2I (four counters for L2 cache events)
>        * PerfMonV2 (support for registers to control multiple
>          counters with a single register write)
>        * LbrAndPmcFreeze (support for freezing last branch recorded stack  
> on
>          performance counter overflow)
>        * NumPerfCtrCore (number of core counters)
>        * NumPerfCtrNB (number of northbridge counters)

>      Signed-off-by: Colton Lewis <coltonlewis@...gle.com>
>      Link:  
> https://lore.kernel.org/r/20240918205319.3517569-3-coltonlewis@google.com
>      [sean: massage changelog, use same names as the kernel]
>      Signed-off-by: Sean Christopherson <seanjc@...gle.com>

> diff --git a/tools/testing/selftests/kvm/include/x86/processor.h  
> b/tools/testing/selftests/kvm/include/x86/processor.h
> index 9ec984cf8674..8de7cace1fbf 100644
> --- a/tools/testing/selftests/kvm/include/x86/processor.h
> +++ b/tools/testing/selftests/kvm/include/x86/processor.h
> @@ -181,6 +181,9 @@ struct kvm_x86_cpu_feature {
>    * Extended Leafs, a.k.a. AMD defined
>    */
>   #define        X86_FEATURE_SVM                  
> KVM_X86_CPU_FEATURE(0x80000001, 0, ECX, 2)
> +#define        X86_FEATURE_PERFCTR_CORE         
> KVM_X86_CPU_FEATURE(0x80000001, 0, ECX, 23)
> +#define        X86_FEATURE_PERFCTR_NB           
> KVM_X86_CPU_FEATURE(0x80000001, 0, ECX, 24)
> +#define        X86_FEATURE_PERFCTR_LLC          
> KVM_X86_CPU_FEATURE(0x80000001, 0, ECX, 28)
>   #define        X86_FEATURE_NX                   
> KVM_X86_CPU_FEATURE(0x80000001, 0, EDX, 20)
>   #define        X86_FEATURE_GBPAGES              
> KVM_X86_CPU_FEATURE(0x80000001, 0, EDX, 26)
>   #define        X86_FEATURE_RDTSCP               
> KVM_X86_CPU_FEATURE(0x80000001, 0, EDX, 27)
> @@ -197,6 +200,8 @@ struct kvm_x86_cpu_feature {
>   #define        X86_FEATURE_VGIF                 
> KVM_X86_CPU_FEATURE(0x8000000A, 0, EDX, 16)
>   #define X86_FEATURE_SEV                         
> KVM_X86_CPU_FEATURE(0x8000001F, 0, EAX, 1)
>   #define X86_FEATURE_SEV_ES             KVM_X86_CPU_FEATURE(0x8000001F,  
> 0, EAX, 3)
> +#define        X86_FEATURE_PERFMON_V2           
> KVM_X86_CPU_FEATURE(0x80000022, 0, EAX, 0)
> +#define        X86_FEATURE_LBR_PMC_FREEZE       
> KVM_X86_CPU_FEATURE(0x80000022, 0, EAX, 2)

>   /*
>    * KVM defined paravirt features.
> @@ -283,6 +288,8 @@ struct kvm_x86_cpu_property {
>   #define X86_PROPERTY_GUEST_MAX_PHY_ADDR                 
> KVM_X86_CPU_PROPERTY(0x80000008, 0, EAX, 16, 23)
>   #define X86_PROPERTY_SEV_C_BIT                  
> KVM_X86_CPU_PROPERTY(0x8000001F, 0, EBX, 0, 5)
>   #define X86_PROPERTY_PHYS_ADDR_REDUCTION        
> KVM_X86_CPU_PROPERTY(0x8000001F, 0, EBX, 6, 11)
> +#define X86_PROPERTY_NR_PERFCTR_CORE            
> KVM_X86_CPU_PROPERTY(0x80000022, 0, EBX, 0, 3)
> +#define X86_PROPERTY_NR_PERFCTR_NB              
> KVM_X86_CPU_PROPERTY(0x80000022, 0, EBX, 10, 15)

>   #define X86_PROPERTY_MAX_CENTAUR_LEAF           
> KVM_X86_CPU_PROPERTY(0xC0000000, 0, EAX, 0, 31)