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Message-ID: <CAJsYDVJMSdYQ9mLhbt_-CwvfS75piT-cV+-Q5EBvh6CEeQPiJw@mail.gmail.com>
Date: Tue, 21 Jan 2025 09:04:47 +0800
From: Chuanhong Guo <gch981213@...il.com>
To: Conor Dooley <conor@...nel.org>
Cc: Paul Walmsley <paul.walmsley@...ive.com>, Palmer Dabbelt <palmer@...belt.com>, 
	Albert Ou <aou@...s.berkeley.edu>, linux-riscv@...ts.infradead.org, 
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] riscv: add Siflower RISC-V SoC family Kconfig support

Hello!

On Tue, Jan 21, 2025 at 2:48 AM Conor Dooley <conor@...nel.org> wrote:
>
> On Mon, Jan 20, 2025 at 10:23:58AM +0800, Chuanhong Guo wrote:
> > Siflower RISC-V SoCs, including SF21A6826, SF21H8898 and some other
> > upcomping chips, are RISC-V chips with T-Head C908 cores for home
> > routers and gateways. Add a Kconfig entry named ARCH_SIFLOWER for
> > them.
> > Notably these chips uses ARM PL011 for UART. ARM_AMBA is selected
> > for its driver.
> >
> > Signed-off-by: Chuanhong Guo <gch981213@...il.com>
>
> This needs to be in a series with the user (your dts)

Could the user be a driver Kconfig instead? When submitting a GPIO driver I
was suggested to not depend on architecture symbol and add soc-specific
ones to arch/ first. [0]

I still need to polish the clock/reset driver a bit before submitting them.
Without a clock driver I can't really submit a dts with meaningful content.

[0] https://lore.kernel.org/linux-gpio/CACRpkdYi_+aQ5L-c4=w9MK-6Uh0e9dX0nnU6LcZcHd90j97q7w@mail.gmail.com/T/#mf2352fb36ed2cb8c6574d9eb0d4c261d9346bf10

-- 
Regards,
Chuanhong Guo

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