linux-kernel - Re: [PATCH] net: phy: c45-tjaxx: add delay between MDIO write and read in soft

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Message-ID:
 <AM8P250MB01249EC410547230AB267A78E1E62@AM8P250MB0124.EURP250.PROD.OUTLOOK.COM>
Date: Tue, 21 Jan 2025 13:20:20 +0000
From: Milos Reljin <milos_reljin@...look.com>
To: Jakub Kicinski <kuba@...nel.org>
Cc: andrei.botila@....nxp.com, andrew@...n.ch, hkallweit1@...il.com,
	linux@...linux.org.uk, davem@...emloft.net, edumazet@...gle.com,
	pabeni@...hat.com, netdev@...r.kernel.org,
	linux-kernel@...r.kernel.org, milos.reljin@...rk.com
Subject: Re: [PATCH] net: phy: c45-tjaxx: add delay between MDIO write and
 read in soft_reset

On Mon, Jan 20, 2025 at 02:47:56PM -0800, Jakub Kicinski wrote:
> On Thu, 16 Jan 2025 14:55:39 +0000 Milos Reljin wrote:
> > Add delay before first MDIO read following MDIO write in soft_reset
> > function. Without this, soft_reset fails and PHY init cannot complete.
> 
> A bit more info about the problem would be good.
> 
> Does the problem happen every time for you, if not how often?

Yes, soft_reset in original driver always returns error.

> What PHY chip do you see this with exactly? The driver supports
> at least two. If you can repro with a evaluation / development /
> reference board of some sort please also mention which.
> -- 
> pw-bot: cr

The PHY is TJA1120A and its PHY_ID_2 register reports value of 0xB031.
Unfortunately I don't have evaluation board - I'm working on custom
board bringup. Linux is running on TI J784S4 SoC.

If you have access to TJA1120's application note (AN13663), page 30
contains info on startup timing.