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Message-ID: <20250122-decode-celtic-fb7a491957bb@spud>
Date: Wed, 22 Jan 2025 18:40:41 +0000
From: Conor Dooley <conor@...nel.org>
To: Mahesh Rao <mahesh.rao@...el.com>
Cc: Moritz Fischer <mdf@...nel.org>, Wu Hao <hao.wu@...el.com>,
	Xu Yilun <yilun.xu@...el.com>, Tom Rix <trix@...hat.com>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Dinh Nguyen <dinguyen@...nel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
	linux-fpga@...r.kernel.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org, Mahesh Rao <mahesh.rao@...era.com>
Subject: Re: [PATCH 2/3] dt-bindings: firmware: stratix10: Convert to
 json-schema

On Wed, Jan 22, 2025 at 01:58:44PM +0800, Mahesh Rao wrote:
> Convert intel,stratix10-svc service layer devicetree
> binding file from freeform format to json-schema.

> diff --git a/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.yaml b/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..b8aae996da87c16007efa7e5e12cced1432b62e9
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/firmware/intel,stratix10-svc.yaml
> @@ -0,0 +1,84 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/firmware/intel,stratix10-svc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Intel Service Layer Driver for Stratix10 SoC
> +
> +maintainers:
> +  - Dinh Nguyen <dinguyen@...nel.org>
> +
> +description: |
> +  Intel Stratix10 SoC is composed of a 64 bit quad-core ARM Cortex A53 hard
> +  processor system (HPS) and Secure Device Manager (SDM). When the FPGA is
> +  configured from HPS, there needs to be a way for HPS to notify SDM the
> +  location and size of the configuration data. Then SDM will get the
> +  configuration data from that location and perform the FPGA configuration.
> +
> +  To meet the whole system security needs and support virtual machine requesting
> +  communication with SDM, only the secure world of software (EL3, Exception
> +  Layer 3) can interface with SDM. All software entities running on other
> +  exception layers must channel through the EL3 software whenever it needs
> +  service from SDM.
> +
> +  Intel Stratix10 service layer driver, running at privileged exception level
> +  (EL1, Exception Layer 1), interfaces with the service providers and provides
> +  the services for FPGA configuration, QSPI, Crypto and warm reset. Service layer
> +  driver also manages secure monitor call (SMC) to communicate with secure monitor
> +  code running in EL3.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - intel,stratix10-svc
> +      - intel,agilex-svc
> +
> +  method:
> +    enum: [smc, hvc]
> +    description: supervisory call method to be used for the service layer.

This looks to be missing a type (string) and an explanation of what "smc" and
"hvc" are.

> +
> +  memory-region:
> +    maxItems: 1
> +    description:
> +      phandle to a reserved memory region for the service layer driver to
> +      communicate with the secure device manager. For more details see
> +      Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt.
> +
> +  fpga-mgr:
> +    $ref: /schemas/fpga/intel,stratix10-soc-fpga-mgr.yaml
> +    description: Optional child node for fpga manager to perform fabric configuration.

This is new and not justified in your commit message. Please explain
where this has come from in v2.

Cheers,
Conor.

> +
> +required:
> +  - compatible
> +  - method
> +  - memory-region
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    reserved-memory {
> +      #address-cells = <2>;
> +      #size-cells = <2>;
> +
> +      service_reserved: svcbuffer@0 {
> +              compatible = "shared-dma-pool";
> +              reg = <0x0 0x0 0x0 0x1000000>;
> +              alignment = <0x1000>;
> +              no-map;
> +      };
> +    };
> +
> +    firmware {
> +      svc {
> +        compatible = "intel,stratix10-svc";
> +        method = "smc";
> +        memory-region = <&service_reserved>;
> +
> +        fpga-mgr {
> +          compatible = "intel,stratix10-soc-fpga-mgr";
> +        };
> +      };
> +    };
> +
> 
> -- 
> 2.35.3
> 

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