linux-kernel - Re: [PATCH v5 4/5] arm64: dts: qcom: ipq5332: Add PCIe related nodes

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Message-ID: <Z5B8pGD/h0h79ykb@hu-varada-blr.qualcomm.com>
Date: Wed, 22 Jan 2025 10:35:40 +0530
From: Varadarajan Narayanan <quic_varada@...cinc.com>
To: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
CC: <bhelgaas@...gle.com>, <lpieralisi@...nel.org>, <kw@...ux.com>,
        <robh@...nel.org>, <krzk+dt@...nel.org>, <conor+dt@...nel.org>,
        <vkoul@...nel.org>, <kishon@...nel.org>, <andersson@...nel.org>,
        <konradybcio@...nel.org>, <p.zabel@...gutronix.de>,
        <quic_nsekar@...cinc.com>, <dmitry.baryshkov@...aro.org>,
        <linux-arm-msm@...r.kernel.org>, <linux-pci@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-phy@...ts.infradead.org>,
        Praveenkumar I <quic_ipkumar@...cinc.com>,
        Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Subject: Re: [PATCH v5 4/5] arm64: dts: qcom: ipq5332: Add PCIe related nodes

Manivannan,

	[ . . . ]
> > > +			phys = <&pcie1_phy>;
> > > +			phy-names = "pciephy";
> > > +
> > > +			interconnects = <&gcc MASTER_SNOC_PCIE3_2_M &gcc SLAVE_SNOC_PCIE3_2_M>,
> > > +					<&gcc MASTER_ANOC_PCIE3_2_S &gcc SLAVE_ANOC_PCIE3_2_S>;
> > > +			interconnect-names = "pcie-mem", "cpu-pcie";
> >
> > Can you check if the controller supports cache coherency? If so, you need to add
> > 'dma-coherent'.
>
> Ok.

Confirmed with h/w person. The controller doesn't support cache coherance.

Thanks
Varada