linux-kernel - [PATCH v3 8/9] arm64: dts: renesas: r9a09g047: Add sys node

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Message-ID: <20250122103911.517484-9-john.madieu.xa@bp.renesas.com>
Date: Wed, 22 Jan 2025 11:39:10 +0100
From: John Madieu <john.madieu.xa@...renesas.com>
To: geert+renesas@...der.be,
	robh@...nel.org,
	linux-renesas-soc@...r.kernel.org,
	devicetree@...r.kernel.org
Cc: biju.das.jz@...renesas.com,
	claudiu.beznea.uj@...renesas.com,
	conor+dt@...nel.org,
	john.madieu@...il.com,
	krzk+dt@...nel.org,
	linux-kernel@...r.kernel.org,
	magnus.damm@...il.com,
	john.madieu.xa@...renesas.com
Subject: [PATCH v3 8/9] arm64: dts: renesas: r9a09g047: Add sys node

Add system controller node to RZ/G3E (R9A09G047) SoC DTSI, as
it is also required for SoC identification

Signed-off-by: John Madieu <john.madieu.xa@...renesas.com>
---
 arch/arm64/boot/dts/renesas/r9a09g047.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi
index 444fadaf7254..0840450dda47 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi
@@ -162,6 +162,13 @@ cpg: clock-controller@...20000 {
 			#power-domain-cells = <0>;
 		};
 
+		sys: system-controller@...30000 {
+			compatible = "renesas,r9a09g047-sys";
+			reg = <0 0x10430000 0 0x10000>;
+			clocks = <&cpg CPG_CORE R9A09G047_SYS_0_PCLK>;
+			resets = <&cpg 0x30>;
+		};
+
 		ostm0: timer@...00000 {
 			compatible = "renesas,r9a09g047-ostm", "renesas,ostm";
 			reg = <0x0 0x11800000 0x0 0x1000>;
-- 
2.25.1