linux-kernel - Re: [PATCH 4/5] pinctrl: Add pin controller driver for AAEON UP boards

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Message-ID: <CACRpkdapanuq=_f6xKFGdVnksEe=3EWY=AxDORwVKacv68nYOQ@mail.gmail.com>
Date: Wed, 22 Jan 2025 13:46:26 +0100
From: Linus Walleij <linus.walleij@...aro.org>
To: Thomas Richard <thomas.richard@...tlin.com>
Cc: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>, 
	Geert Uytterhoeven <geert+renesas@...der.be>, Bartosz Golaszewski <brgl@...ev.pl>, Lee Jones <lee@...nel.org>, 
	Pavel Machek <pavel@....cz>, linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org, 
	linux-leds@...r.kernel.org, thomas.petazzoni@...tlin.com, 
	DanieleCleri@...on.eu, GaryWang@...on.com.tw
Subject: Re: [PATCH 4/5] pinctrl: Add pin controller driver for AAEON UP boards

On Thu, Jan 16, 2025 at 1:21 PM Thomas Richard
<thomas.richard@...tlin.com> wrote:

> For the pinconf / pinmux, the FPGA is just a voltage translator. It is
> transparent. The only relevant thing for the FPGA is the direction to
> set for the switch of each pin. And the drivers knows which directions
> to apply during the probe. This direction will only change in GPIO mode,
> but in GPIO mode we know which direction to set.

Just a thought:

Maybe the lowest impact is to just patch in the extra operations
directly in the existing Intel pin control/GPIO driver in
drivers/pinctrl/intel?

I don't know how this is detected by the system (I guess some
ACPI magic since it's Intel, in DT we can detect the top-level
board) but it can certainly be done and
probably replaced with compiled-out stubs if not used.

This might not be what Andy desires though, I think he has
the final word on how this should be engineered.

Yours,
Linus Walleij