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Message-ID: <Z5KVPg/DuJHci/77@lizhi-Precision-Tower-5810>
Date: Thu, 23 Jan 2025 14:15:10 -0500
From: Frank Li <Frank.li@....com>
To: Bjorn Helgaas <helgaas@...nel.org>
Cc: Rob Herring <robh@...nel.org>, Saravana Kannan <saravanak@...gle.com>,
Jingoo Han <jingoohan1@...il.com>,
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof WilczyĆski <kw@...ux.com>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Richard Zhu <hongxing.zhu@....com>,
Lucas Stach <l.stach@...gutronix.de>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, imx@...ts.linux.dev
Subject: Re: [PATCH v8 2/7] PCI: dwc: Use devicetree 'ranges' property to get
rid of cpu_addr_fixup() callback
On Thu, Jan 23, 2025 at 01:04:22PM -0600, Bjorn Helgaas wrote:
> On Thu, Jan 23, 2025 at 10:21:36AM -0500, Frank Li wrote:
> > On Fri, Jan 17, 2025 at 10:42:37AM -0500, Frank Li wrote:
> > > On Thu, Jan 16, 2025 at 05:29:16PM -0600, Bjorn Helgaas wrote:
> > > > On Thu, Jan 16, 2025 at 05:14:00PM -0600, Bjorn Helgaas wrote:
> > > > > On Tue, Nov 19, 2024 at 02:44:20PM -0500, Frank Li wrote:
> > > > > > parent_bus_addr in struct of_range can indicate address information just
> > > > > > ahead of PCIe controller. Most system's bus fabric use 1:1 map between
> > > > > > input and output address. but some hardware like i.MX8QXP doesn't use 1:1
> > > > > > map.
> > ...
>
> > I saw you have not picked all of these patches during you rework
> > pci git branches.
> >
> > I know you are busy, do you have chance to pick left patch for 6.14.
>
> This series had a mix of things: several patches related to
> .cpu_addr_fixup(), plus several unrelated ones for PHY mode and i.MX8Q
> support. I think I picked up all the unrelated ones.
>
> .cpu_addr_fixup() is a generic problem that affects dwc (dra7xx, imx6,
> artpec6, intel-gw, visconti), cadence (cadence-plat), and now
> apparently microchip.
>
> I deferred these because I'm hoping we can come up with a more generic
> solution that's easier to apply across all these cases. I don't
> really want to merge something that immediately needs to be reworked
> for other drivers.
>
> A few of the things I wonder about:
>
> - dw_pcie_get_parent_addr() has no DWC dependencies, so it doesn't
> make sense to me to have it be DWC-specific and copy and pasted
> to other places that need something similar.
>
> - It doesn't seem elegant to iterate through for_each_pci_range() in
> devm_of_pci_get_host_bridge_resources(), then again in
> dw_pcie_host_init() for io_bus_addr, then again in
> dw_pcie_iatu_setup() for each window. Maybe that's the best we
> can do, but maybe there's a way to capture what we need on the
> first time through.
>
> - The connection between .cpu_addr_fixup() and use_parent_dt_ranges
> is clear in the patches remove a .cpu_addr_fixup(), but not in the
> DWC patches on the other end.
>
> - Ideally, "use_parent_dt_ranges" would be the default and we
> wouldn't have a flag to indicate that, and drivers would have to
> opt out instead of opt in. They basically already do that by
> implementing .cpu_addr_fixup(), so maybe we can take advantage of
> that fact.
Okay, thanks. let me think how to improve it after 6.14.
Frank
>
> Bjorn
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