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Message-ID: <34c4f359-3050-49a5-9421-f0254118b775@amd.com>
Date: Thu, 23 Jan 2025 13:51:44 -0600
From: "Moger, Babu" <babu.moger@....com>
To: Reinette Chatre <reinette.chatre@...el.com>, tglx@...utronix.de,
mingo@...hat.com, bp@...en8.de, dave.hansen@...ux.intel.com
Cc: fenghua.yu@...el.com, x86@...nel.org, hpa@...or.com,
akpm@...ux-foundation.org, paulmck@...nel.org, thuth@...hat.com,
rostedt@...dmis.org, xiongwei.song@...driver.com,
pawan.kumar.gupta@...ux.intel.com, jpoimboe@...nel.org,
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linux-kernel@...r.kernel.org, eranian@...gle.com, corbet@....net
Subject: Re: [PATCH v2 4/7] x86/resctrl: Implement "io_alloc" enable/disable
handlers
Hi Reinette,
On 12/23/24 15:14, Reinette Chatre wrote:
> Hi Babu,
>
> On 12/18/24 1:38 PM, Babu Moger wrote:
>> Introduce architecture-specific2yy handlers to manage the detection and
>
> "architecture-specific2yy"?
My bad.
>
>> enabling/disabling of this feature.
>
> Please add more to the context. It just jumps in with a "this feature" without
> any introduction.
Sure. Will rewrite the commit text.
>
>>
>> SDCIAE feature can be enabled by setting bit 1 in MSR L3_QOS_EXT_CFG.
>> When the state of SDCIAE is modified, the updated value must be applied
>> across all logical processors within the QOS Domain. By default, the
>> io_alloc feature is turned off.
>>
>> The SDCIAE feature details are available in APM listed below [1].
>> [1] AMD64 Architecture Programmer's Manual Volume 2: System Programming
>> Publication # 24593 Revision 3.41 section 19.4.7 L3 Smart Data Cache
>> Injection Allocation Enforcement (SDCIAE)
>>
>> Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537
>> Signed-off-by: Babu Moger <babu.moger@....com>
>> ---
>> v2: Renamed the functions to simplify the code.
>> Renamed sdciae_capable to io_alloc_capable.
>>
>> Changed the name of few arch functions similar to ABMC series.
>> resctrl_arch_get_io_alloc_enabled()
>> resctrl_arch_io_alloc_enable()
>> ---
>> arch/x86/include/asm/msr-index.h | 1 +
>> arch/x86/kernel/cpu/resctrl/internal.h | 10 ++++++++
>> arch/x86/kernel/cpu/resctrl/rdtgroup.c | 34 ++++++++++++++++++++++++++
>> include/linux/resctrl.h | 9 +++++++
>> 4 files changed, 54 insertions(+)
>>
>> diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
>> index 3f3e2bc99162..360c52a62da9 100644
>> --- a/arch/x86/include/asm/msr-index.h
>> +++ b/arch/x86/include/asm/msr-index.h
>> @@ -1196,6 +1196,7 @@
>> /* - AMD: */
>> #define MSR_IA32_MBA_BW_BASE 0xc0000200
>> #define MSR_IA32_SMBA_BW_BASE 0xc0000280
>> +#define MSR_IA32_L3_QOS_EXT_CFG 0xc00003ff
>> #define MSR_IA32_EVT_CFG_BASE 0xc0000400
>>
>> /* AMD-V MSRs */
>> diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/resctrl/internal.h
>> index 20c898f09b7e..dff3354c2282 100644
>> --- a/arch/x86/kernel/cpu/resctrl/internal.h
>> +++ b/arch/x86/kernel/cpu/resctrl/internal.h
>> @@ -56,6 +56,9 @@
>> /* Max event bits supported */
>> #define MAX_EVT_CONFIG_BITS GENMASK(6, 0)
>>
>> +/* Setting bit 1 in L3_QOS_EXT_CFG enables the SDCIAE feature. */
>> +#define SDCIAE_ENABLE_BIT 1
>> +
>> /**
>> * cpumask_any_housekeeping() - Choose any CPU in @mask, preferring those that
>> * aren't marked nohz_full
>> @@ -479,6 +482,7 @@ struct rdt_parse_data {
>> * @mbm_cfg_mask: Bandwidth sources that can be tracked when Bandwidth
>> * Monitoring Event Configuration (BMEC) is supported.
>> * @cdp_enabled: CDP state of this resource
>> + * @sdciae_enabled: SDCIAE feature is enabled
>> *
>> * Members of this structure are either private to the architecture
>> * e.g. mbm_width, or accessed via helpers that provide abstraction. e.g.
>> @@ -493,6 +497,7 @@ struct rdt_hw_resource {
>> unsigned int mbm_width;
>> unsigned int mbm_cfg_mask;
>> bool cdp_enabled;
>> + bool sdciae_enabled;
>> };
>>
>> static inline struct rdt_hw_resource *resctrl_to_arch_res(struct rdt_resource *r)
>> @@ -539,6 +544,11 @@ int resctrl_arch_set_cdp_enabled(enum resctrl_res_level l, bool enable);
>>
>> void arch_mon_domain_online(struct rdt_resource *r, struct rdt_mon_domain *d);
>>
>> +static inline bool resctrl_arch_get_io_alloc_enabled(enum resctrl_res_level l)
>
> The custom is to pass a pointer to the resource when interacting with it. Why is it
> needed to pass the ID here?
Will change it.
>
>> +{
>> + return rdt_resources_all[l].sdciae_enabled;
>> +}
>> +
>> /*
>> * To return the common struct rdt_resource, which is contained in struct
>> * rdt_hw_resource, walk the resctrl member of struct rdt_hw_resource.
>> diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/resctrl/rdtgroup.c
>> index 6419e04d8a7b..398f241b65d5 100644
>> --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c
>> +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c
>> @@ -1798,6 +1798,40 @@ static ssize_t mbm_local_bytes_config_write(struct kernfs_open_file *of,
>> return ret ?: nbytes;
>> }
>>
>> +static void resctrl_sdciae_set_one_amd(void *arg)
>> +{
>> + bool *enable = arg;
>> +
>> + if (*enable)
>> + msr_set_bit(MSR_IA32_L3_QOS_EXT_CFG, SDCIAE_ENABLE_BIT);
>> + else
>> + msr_clear_bit(MSR_IA32_L3_QOS_EXT_CFG, SDCIAE_ENABLE_BIT);
>> +}
>> +
>> +static int _resctrl_io_alloc_enable(struct rdt_resource *r, bool enable)
>> +{
>> + struct rdt_ctrl_domain *d;
>> +
>> + /* Update L3_QOS_EXT_CFG MSR on all the CPUs in all domains*/
>> + list_for_each_entry(d, &r->ctrl_domains, hdr.list)
>> + on_each_cpu_mask(&d->hdr.cpu_mask, resctrl_sdciae_set_one_amd, &enable, 1);
>> +
>> + return 0;
>
> Same comment as in V1 about this arch specific handler always returning 0 and can thus
> just return void. Also the name should not reflect that it is resctrl code. One
> option could be _resctrl_arch_io_alloc_enable().
Sure.
>
>> +}
>> +
>> +int resctrl_arch_io_alloc_enable(struct rdt_resource *r, bool enable)
>> +{
>> + struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r);
>> +
>> + if (hw_res->r_resctrl.cache.io_alloc_capable &&
>> + hw_res->sdciae_enabled != enable) {
>> + _resctrl_io_alloc_enable(r, enable);
>> + hw_res->sdciae_enabled = enable;
>> + }
>> +
>> + return 0;
>> +}
>> +
>> /* rdtgroup information files for one cache resource. */
>> static struct rftype res_common_files[] = {
>> {
>> diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h
>> index 5837acff7442..8c66aeac4768 100644
>> --- a/include/linux/resctrl.h
>> +++ b/include/linux/resctrl.h
>> @@ -344,6 +344,15 @@ void resctrl_arch_reset_rmid(struct rdt_resource *r, struct rdt_mon_domain *d,
>> */
>> void resctrl_arch_reset_rmid_all(struct rdt_resource *r, struct rdt_mon_domain *d);
>>
>> +/**
>> + * resctrl_arch_io_alloc_enable() - Enable/disable io_alloc feature.
>> + * @r: The resctrl resource.
>> + * @enable: Enable (1) or disable (0) the feature
>> + *
>> + * This can be called from any CPU.
>> + */
>> +int resctrl_arch_io_alloc_enable(struct rdt_resource *r, bool enable);
>> +
>> extern unsigned int resctrl_rmid_realloc_threshold;
>> extern unsigned int resctrl_rmid_realloc_limit;
>>
>
> Reinette
>
--
Thanks
Babu Moger
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