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Message-ID: <1b429f3f-2fff-45bb-86dd-48b1d164ccc8@quicinc.com>
Date: Thu, 23 Jan 2025 13:32:02 -0800
From: Abhinav Kumar <quic_abhinavk@...cinc.com>
To: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
Rob Clark
<robdclark@...il.com>, Sean Paul <sean@...rly.run>,
Marijn Suijten
<marijn.suijten@...ainline.org>,
David Airlie <airlied@...il.com>, Simona
Vetter <simona@...ll.ch>,
Vinod Koul <vkoul@...nel.org>, Konrad Dybcio
<konradybcio@...nel.org>
CC: <linux-arm-msm@...r.kernel.org>, <dri-devel@...ts.freedesktop.org>,
<freedreno@...ts.freedesktop.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 18/35] drm/msm/dpu: get rid of DPU_PINGPONG_DSC
On 12/13/2024 2:14 PM, Dmitry Baryshkov wrote:
> Continue migration to the MDSS-revision based checks and replace
> DPU_PINGPONG_DSC feature bit with the core_major_ver < 7 check.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
> ---
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_14_msm8937.h | 2 --
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_15_msm8917.h | 1 -
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_16_msm8953.h | 2 --
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_7_msm8996.h | 6 ++----
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 10 ++--------
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 2 --
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 2 +-
> 7 files changed, 5 insertions(+), 20 deletions(-)
>
<snip>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
> index 36c0ec775b92036eaab26e1fa5331579651ac27c..49e03ecee9e8b567a3f809b977deb83731006ac0 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
> @@ -319,7 +319,7 @@ struct dpu_hw_pingpong *dpu_hw_pingpong_init(struct drm_device *dev,
> c->ops.disable_autorefresh = dpu_hw_pp_disable_autorefresh;
> }
>
> - if (test_bit(DPU_PINGPONG_DSC, &cfg->features)) {
> + if (mdss_rev->core_major_ver < 7) {
> c->ops.setup_dsc = dpu_hw_pp_setup_dsc;
> c->ops.enable_dsc = dpu_hw_pp_dsc_enable;
> c->ops.disable_dsc = dpu_hw_pp_dsc_disable;
>
So far in this series, we replaced the feature bits with >= checks of
core_revisions. That kind of works as usually feature bits get added
after a specific version.
With this patch and later, whenever we use < checks it gets a bit tricky
as we might also need an upper bound. Feature bits gave individual
control of chipsets but generalizing that all chipsets < 7 have PP DSC
is also not correct. I have to really cross-check but there could be
some old chipsets which do not have DSC at all.
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