linux-kernel - Re: [PATCH v3 1/3] dt-bindings: interrupt-controller: Add Sophgo SG2042 MSI

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Message-ID:
 <BM1PR01MB2545B70D34614F5BE04B116EFEE02@BM1PR01MB2545.INDPRD01.PROD.OUTLOOK.COM>
Date: Thu, 23 Jan 2025 08:47:26 +0800
From: Chen Wang <unicorn_wang@...look.com>
To: Inochi Amaoto <inochiama@...il.com>, Chen Wang <unicornxw@...il.com>,
 u.kleine-koenig@...libre.com, aou@...s.berkeley.edu, arnd@...db.de,
 conor+dt@...nel.org, guoren@...nel.org, inochiama@...look.com,
 krzk+dt@...nel.org, palmer@...belt.com, paul.walmsley@...ive.com,
 robh@...nel.org, tglx@...utronix.de, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
 chao.wei@...hgo.com, xiaoguang.xing@...hgo.com, fengchun.li@...hgo.com,
 samuel.holland@...ive.com, christophe.jaillet@...adoo.fr
Subject: Re: [PATCH v3 1/3] dt-bindings: interrupt-controller: Add Sophgo
 SG2042 MSI


On 2025/1/23 6:42, Inochi Amaoto wrote:
> On Wed, Jan 22, 2025 at 09:51:05PM +0800, Chen Wang wrote:
>> On 2025/1/20 10:42, Inochi Amaoto wrote:
>>> On Wed, Jan 15, 2025 at 02:33:23PM +0800, Chen Wang wrote:
>> [......]
>>>> +  reg:
>>>> +    items:
>>>> +      - description: msi doorbell address
>>>> +      - description: clear register
>>>> +
>>>> +  reg-names:
>>>> +    items:
>>>> +      - const: doorbell
>>>> +      - const: clr
>>> please reverse the items order, the clr addr is more suitable
>>> as the MMIO device address when writing device node. doorbeel
>>> address is just a IO address and can not be seen from CPU.
>> I find dtbcheck will report error if order is switched.
>>
> You should also change the unit address to avoid error.
> I think you forgot it.

I forgot it, thanks for your suggestion.


>> On SG2042, address of doorbell is ahead of clr.
>>
> It is the same on SG2044, but there is a problem that the
> doorbell addr is a IO address and it is not suitable to
> represent the device addr in the dtb. It also lead to a
> weird unit address on SG2044 which is hard to understand.
>
> Regards,
> Inochi