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Message-ID: <d4aa6903-f350-4130-a915-7a8d2916f1e0@nexus-software.ie>
Date: Thu, 23 Jan 2025 11:31:57 +0000
From: Bryan O'Donoghue <pure.logic@...us-software.ie>
To: Jordan Crouse <jorcrous@...zon.com>, linux-arm-msm@...r.kernel.org
Cc: Bjorn Andersson <andersson@...nel.org>,
Michael Turquette <mturquette@...libre.com>, Stephen Boyd
<sboyd@...nel.org>, linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] clk: qcom: camcc-sm8250: Use clk_rcg2_shared_ops for some
RCGs
On 22/01/2025 21:34, Jordan Crouse wrote:
> Update some RCGs on the sm8250 camera clock controller to use
> clk_rcg2_shared_ops. The shared_ops ensure the RCGs get parked
> to the XO during clock disable to prevent the clocks from locking up
> when the GDSC is enabled. These mirror similar fixes for other controllers
> such as commit 8d4025943e13 ("clk: qcom: camcc-sc7180: Use runtime PM ops
> instead of clk ones").
>
> Signed-off-by: Jordan Crouse <jorcrous@...zon.com>
> ---
>
> drivers/clk/qcom/camcc-sm8250.c | 56 ++++++++++++++++-----------------
> 1 file changed, 28 insertions(+), 28 deletions(-)
>
> diff --git a/drivers/clk/qcom/camcc-sm8250.c b/drivers/clk/qcom/camcc-sm8250.c
> index 34d2f17520dc..450ddbebd35f 100644
> --- a/drivers/clk/qcom/camcc-sm8250.c
> +++ b/drivers/clk/qcom/camcc-sm8250.c
> @@ -411,7 +411,7 @@ static struct clk_rcg2 cam_cc_bps_clk_src = {
> .parent_data = cam_cc_parent_data_0,
> .num_parents = ARRAY_SIZE(cam_cc_parent_data_0),
> .flags = CLK_SET_RATE_PARENT,
> - .ops = &clk_rcg2_ops,
> + .ops = &clk_rcg2_shared_ops,
> },
> };
>
> @@ -433,7 +433,7 @@ static struct clk_rcg2 cam_cc_camnoc_axi_clk_src = {
> .parent_data = cam_cc_parent_data_0,
> .num_parents = ARRAY_SIZE(cam_cc_parent_data_0),
> .flags = CLK_SET_RATE_PARENT,
> - .ops = &clk_rcg2_ops,
> + .ops = &clk_rcg2_shared_ops,
> },
> };
>
> @@ -454,7 +454,7 @@ static struct clk_rcg2 cam_cc_cci_0_clk_src = {
> .parent_data = cam_cc_parent_data_0,
> .num_parents = ARRAY_SIZE(cam_cc_parent_data_0),
> .flags = CLK_SET_RATE_PARENT,
> - .ops = &clk_rcg2_ops,
> + .ops = &clk_rcg2_shared_ops,
> },
> };
>
> @@ -469,7 +469,7 @@ static struct clk_rcg2 cam_cc_cci_1_clk_src = {
> .parent_data = cam_cc_parent_data_0,
> .num_parents = ARRAY_SIZE(cam_cc_parent_data_0),
> .flags = CLK_SET_RATE_PARENT,
> - .ops = &clk_rcg2_ops,
> + .ops = &clk_rcg2_shared_ops,
> },
> };
>
> @@ -490,7 +490,7 @@ static struct clk_rcg2 cam_cc_cphy_rx_clk_src = {
> .parent_data = cam_cc_parent_data_0,
> .num_parents = ARRAY_SIZE(cam_cc_parent_data_0),
> .flags = CLK_SET_RATE_PARENT,
> - .ops = &clk_rcg2_ops,
> + .ops = &clk_rcg2_shared_ops,
> },
> };
>
> @@ -511,7 +511,7 @@ static struct clk_rcg2 cam_cc_csi0phytimer_clk_src = {
> .parent_data = cam_cc_parent_data_0,
> .num_parents = ARRAY_SIZE(cam_cc_parent_data_0),
> .flags = CLK_SET_RATE_PARENT,
> - .ops = &clk_rcg2_ops,
> + .ops = &clk_rcg2_shared_ops,
> },
> };
>
> @@ -526,7 +526,7 @@ static struct clk_rcg2 cam_cc_csi1phytimer_clk_src = {
> .parent_data = cam_cc_parent_data_0,
> .num_parents = ARRAY_SIZE(cam_cc_parent_data_0),
> .flags = CLK_SET_RATE_PARENT,
> - .ops = &clk_rcg2_ops,
> + .ops = &clk_rcg2_shared_ops,
> },
> };
>
> @@ -556,7 +556,7 @@ static struct clk_rcg2 cam_cc_csi3phytimer_clk_src = {
> .parent_data = cam_cc_parent_data_0,
> .num_parents = ARRAY_SIZE(cam_cc_parent_data_0),
> .flags = CLK_SET_RATE_PARENT,
> - .ops = &clk_rcg2_ops,
> + .ops = &clk_rcg2_shared_ops,
> },
> };
>
> @@ -571,7 +571,7 @@ static struct clk_rcg2 cam_cc_csi4phytimer_clk_src = {
> .parent_data = cam_cc_parent_data_0,
> .num_parents = ARRAY_SIZE(cam_cc_parent_data_0),
> .flags = CLK_SET_RATE_PARENT,
> - .ops = &clk_rcg2_ops,
> + .ops = &clk_rcg2_shared_ops,
> },
> };
>
> @@ -586,7 +586,7 @@ static struct clk_rcg2 cam_cc_csi5phytimer_clk_src = {
> .parent_data = cam_cc_parent_data_0,
> .num_parents = ARRAY_SIZE(cam_cc_parent_data_0),
> .flags = CLK_SET_RATE_PARENT,
> - .ops = &clk_rcg2_ops,
> + .ops = &clk_rcg2_shared_ops,
> },
> };
>
> @@ -611,7 +611,7 @@ static struct clk_rcg2 cam_cc_fast_ahb_clk_src = {
> .parent_data = cam_cc_parent_data_0,
> .num_parents = ARRAY_SIZE(cam_cc_parent_data_0),
> .flags = CLK_SET_RATE_PARENT,
> - .ops = &clk_rcg2_ops,
> + .ops = &clk_rcg2_shared_ops,
> },
> };
>
> @@ -634,7 +634,7 @@ static struct clk_rcg2 cam_cc_fd_core_clk_src = {
> .parent_data = cam_cc_parent_data_0,
> .num_parents = ARRAY_SIZE(cam_cc_parent_data_0),
> .flags = CLK_SET_RATE_PARENT,
> - .ops = &clk_rcg2_ops,
> + .ops = &clk_rcg2_shared_ops,
> },
> };
>
> @@ -649,7 +649,7 @@ static struct clk_rcg2 cam_cc_icp_clk_src = {
> .parent_data = cam_cc_parent_data_0,
> .num_parents = ARRAY_SIZE(cam_cc_parent_data_0),
> .flags = CLK_SET_RATE_PARENT,
> - .ops = &clk_rcg2_ops,
> + .ops = &clk_rcg2_shared_ops,
> },
> };
>
> @@ -673,7 +673,7 @@ static struct clk_rcg2 cam_cc_ife_0_clk_src = {
> .parent_data = cam_cc_parent_data_2,
> .num_parents = ARRAY_SIZE(cam_cc_parent_data_2),
> .flags = CLK_SET_RATE_PARENT,
> - .ops = &clk_rcg2_ops,
> + .ops = &clk_rcg2_shared_ops,
> },
> };
>
> @@ -710,7 +710,7 @@ static struct clk_rcg2 cam_cc_ife_0_csid_clk_src = {
> .parent_data = cam_cc_parent_data_0,
> .num_parents = ARRAY_SIZE(cam_cc_parent_data_0),
> .flags = CLK_SET_RATE_PARENT,
> - .ops = &clk_rcg2_ops,
> + .ops = &clk_rcg2_shared_ops,
> },
> };
>
> @@ -734,7 +734,7 @@ static struct clk_rcg2 cam_cc_ife_1_clk_src = {
> .parent_data = cam_cc_parent_data_3,
> .num_parents = ARRAY_SIZE(cam_cc_parent_data_3),
> .flags = CLK_SET_RATE_PARENT,
> - .ops = &clk_rcg2_ops,
> + .ops = &clk_rcg2_shared_ops,
> },
> };
>
> @@ -749,7 +749,7 @@ static struct clk_rcg2 cam_cc_ife_1_csid_clk_src = {
> .parent_data = cam_cc_parent_data_0,
> .num_parents = ARRAY_SIZE(cam_cc_parent_data_0),
> .flags = CLK_SET_RATE_PARENT,
> - .ops = &clk_rcg2_ops,
> + .ops = &clk_rcg2_shared_ops,
> },
> };
>
> @@ -771,7 +771,7 @@ static struct clk_rcg2 cam_cc_ife_lite_clk_src = {
> .parent_data = cam_cc_parent_data_0,
> .num_parents = ARRAY_SIZE(cam_cc_parent_data_0),
> .flags = CLK_SET_RATE_PARENT,
> - .ops = &clk_rcg2_ops,
> + .ops = &clk_rcg2_shared_ops,
> },
> };
>
> @@ -786,7 +786,7 @@ static struct clk_rcg2 cam_cc_ife_lite_csid_clk_src = {
> .parent_data = cam_cc_parent_data_0,
> .num_parents = ARRAY_SIZE(cam_cc_parent_data_0),
> .flags = CLK_SET_RATE_PARENT,
> - .ops = &clk_rcg2_ops,
> + .ops = &clk_rcg2_shared_ops,
> },
> };
>
> @@ -810,7 +810,7 @@ static struct clk_rcg2 cam_cc_ipe_0_clk_src = {
> .parent_data = cam_cc_parent_data_4,
> .num_parents = ARRAY_SIZE(cam_cc_parent_data_4),
> .flags = CLK_SET_RATE_PARENT,
> - .ops = &clk_rcg2_ops,
> + .ops = &clk_rcg2_shared_ops,
> },
> };
>
> @@ -825,7 +825,7 @@ static struct clk_rcg2 cam_cc_jpeg_clk_src = {
> .parent_data = cam_cc_parent_data_0,
> .num_parents = ARRAY_SIZE(cam_cc_parent_data_0),
> .flags = CLK_SET_RATE_PARENT,
> - .ops = &clk_rcg2_ops,
> + .ops = &clk_rcg2_shared_ops,
> },
> };
>
> @@ -847,7 +847,7 @@ static struct clk_rcg2 cam_cc_mclk0_clk_src = {
> .parent_data = cam_cc_parent_data_1,
> .num_parents = ARRAY_SIZE(cam_cc_parent_data_1),
> .flags = CLK_SET_RATE_PARENT,
> - .ops = &clk_rcg2_ops,
> + .ops = &clk_rcg2_shared_ops,
> },
> };
>
> @@ -862,7 +862,7 @@ static struct clk_rcg2 cam_cc_mclk1_clk_src = {
> .parent_data = cam_cc_parent_data_1,
> .num_parents = ARRAY_SIZE(cam_cc_parent_data_1),
> .flags = CLK_SET_RATE_PARENT,
> - .ops = &clk_rcg2_ops,
> + .ops = &clk_rcg2_shared_ops,
> },
> };
>
> @@ -877,7 +877,7 @@ static struct clk_rcg2 cam_cc_mclk2_clk_src = {
> .parent_data = cam_cc_parent_data_1,
> .num_parents = ARRAY_SIZE(cam_cc_parent_data_1),
> .flags = CLK_SET_RATE_PARENT,
> - .ops = &clk_rcg2_ops,
> + .ops = &clk_rcg2_shared_ops,
> },
> };
>
> @@ -892,7 +892,7 @@ static struct clk_rcg2 cam_cc_mclk3_clk_src = {
> .parent_data = cam_cc_parent_data_1,
> .num_parents = ARRAY_SIZE(cam_cc_parent_data_1),
> .flags = CLK_SET_RATE_PARENT,
> - .ops = &clk_rcg2_ops,
> + .ops = &clk_rcg2_shared_ops,
> },
> };
>
> @@ -907,7 +907,7 @@ static struct clk_rcg2 cam_cc_mclk4_clk_src = {
> .parent_data = cam_cc_parent_data_1,
> .num_parents = ARRAY_SIZE(cam_cc_parent_data_1),
> .flags = CLK_SET_RATE_PARENT,
> - .ops = &clk_rcg2_ops,
> + .ops = &clk_rcg2_shared_ops,
> },
> };
>
> @@ -922,7 +922,7 @@ static struct clk_rcg2 cam_cc_mclk5_clk_src = {
> .parent_data = cam_cc_parent_data_1,
> .num_parents = ARRAY_SIZE(cam_cc_parent_data_1),
> .flags = CLK_SET_RATE_PARENT,
> - .ops = &clk_rcg2_ops,
> + .ops = &clk_rcg2_shared_ops,
> },
> };
>
> @@ -993,7 +993,7 @@ static struct clk_rcg2 cam_cc_slow_ahb_clk_src = {
> .parent_data = cam_cc_parent_data_0,
> .num_parents = ARRAY_SIZE(cam_cc_parent_data_0),
> .flags = CLK_SET_RATE_PARENT,
> - .ops = &clk_rcg2_ops,
> + .ops = &clk_rcg2_shared_ops,
> },
> };
>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@...aro.org>
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