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Message-ID: <4455b317-aeea-42ff-be55-020d52330219@collabora.com>
Date: Thu, 23 Jan 2025 13:33:51 +0100
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
To: Andy-ld Lu <andy-ld.lu@...iatek.com>, ulf.hansson@...aro.org,
matthias.bgg@...il.com, wenbin.mei@...iatek.com
Cc: linux-mmc@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-mediatek@...ts.infradead.org
Subject: Re: [PATCH v2] mmc: mtk-sd: Fix register settings for hs400(es) mode
Il 23/01/25 10:26, Andy-ld Lu ha scritto:
> For hs400(es) mode, the 'hs400-ds-delay' is typically configured in the
> dts. However, some projects may only define 'mediatek,hs400-ds-dly3',
> which can lead to initialization failures in hs400es mode. CMD13 reported
> response crc error in the mmc_switch_status() just after switching to
> hs400es mode.
>
> [ 1.914038][ T82] mmc0: mmc_select_hs400es failed, error -84
> [ 1.914954][ T82] mmc0: error -84 whilst initialising MMC card
>
> Currently, the hs400_ds_dly3 value is set within the tuning function. This
> means that the PAD_DS_DLY3 field is not configured before tuning process,
> which is the reason for the above-mentioned CMD13 response crc error.
>
> Move the PAD_DS_DLY3 field configuration into msdc_prepare_hs400_tuning(),
> and add a value check of hs400_ds_delay to prevent overwriting by zero when
> the 'hs400-ds-delay' is not set in the dts. In addition, since hs400(es)
> only tune the PAD_DS_DLY1, the PAD_DS_DLY2_SEL bit should be cleared to
> bypass it.
>
> Fixes: c4ac38c6539b ("mmc: mtk-sd: Add HS400 online tuning support")
> Signed-off-by: Andy-ld Lu <andy-ld.lu@...iatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
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