Message-ID: <de0a80f0-f6b8-4213-8687-7111e6ad7aba@quicinc.com>
Date: Fri, 24 Jan 2025 11:50:00 +0800
From: Ziqi Chen <quic_ziqichen@...cinc.com>
To: <neil.armstrong@...aro.org>, <quic_cang@...cinc.com>, <bvanassche@....org>,
        <mani@...nel.org>, <beanhuo@...ron.com>, <avri.altman@....com>,
        <junwoo80.lee@...sung.com>, <martin.petersen@...cle.com>,
        <quic_nguyenb@...cinc.com>, <quic_nitirawa@...cinc.com>,
        <quic_rampraka@...cinc.com>
CC: <linux-arm-msm@...r.kernel.org>, <linux-scsi@...r.kernel.org>,
        "Matthias
 Brugger" <matthias.bgg@...il.com>,
        AngeloGioacchino Del Regno
	<angelogioacchino.delregno@...labora.com>,
        "open list:ARM/Mediatek SoC
 support:Keyword:mediatek" <linux-kernel@...r.kernel.org>,
        "moderated
 list:ARM/Mediatek SoC support:Keyword:mediatek"
	<linux-arm-kernel@...ts.infradead.org>,
        "moderated list:ARM/Mediatek SoC
 support:Keyword:mediatek" <linux-mediatek@...ts.infradead.org>
Subject: Re: [PATCH v2 0/8] Support Multi-frequency scale for UFS



On 1/24/2025 4:12 AM, neil.armstrong@...aro.org wrote:
> Hi,
> 
> On 22/01/2025 11:02, Ziqi Chen wrote:
>> With OPP V2 enabled, devfreq can scale clocks amongst multiple frequency
>> plans. However, the gear speed is only toggled between min and max during
>> clock scaling. Enable multi-level gear scaling by mapping clock 
>> frequencies
>> to gear speeds, so that when devfreq scales clock frequencies we can put
>> the UFS link at the appropraite gear speeds accordingly.
>>
>> This series has been tested on below platforms -
>> sm8550 mtp + UFS3.1
>> SM8650 MTP + UFS3.1
>> SM8750 MTP + UFS4.0
> 
> Thanks, could you be more precise on how you tested this feature ? how 
> did you exercise the gear changes and check that is cales correctly ?
> 
> Thanks,
> Neil
> 

Hi Neil,

I made a Debugging patch that track the freq and gear in UFS devfreq and 
clkscale path. I do data transfer from userspace and print out devfreq 
target freq , clkscale recommended freq , final clkscale freq and gear 
value of before and after clkscale.

For example, we can get such logs on SM8550 as below:

[    5.424720] [DEBUG]ufshcd_devfreq_target: target freq = 75000000
[    5.509541] [DEBUG]ufshcd_devfreq_target: recommended freq = 75000000
[    5.525463] [DEBUG]ufshcd_devfreq_target: final freq = 75000000
[    5.525464] [DEBUG]ufshcd_devfreq_target: scaling DOWN from freq 
300000000 to freq 75000000
[    5.525468] [DEBUG]ufshcd_devfreq_scale: freq 75000000 mapped to gear 
1 , caller: ufshcd_devfreq_target+0x298/0x3e4
[    5.525531] [DEBUG]ufshcd_devfreq_scale: scaling DOWN gear from 4 -> 1
[    5.728018] [DEBUG]ufshcd_devfreq_target: updated target freq to 75000000


.. G1 -> G4...

[  261.068843] [DEBUG]ufshcd_devfreq_target: target freq = 300000000
[  261.075242] [DEBUG]ufshcd_devfreq_target: recommended freq = 300000000
[  261.082055] [DEBUG]ufshcd_devfreq_target: final freq = 300000000
[  261.088280] [DEBUG]ufshcd_devfreq_target: scaling UP from freq 
75000000 to freq 300000000
[  261.096743] ufshcd-qcom 1d84000.ufshc: 
ufshcd_is_devfreq_scaling_required: req_freq= 300000000, target_freq = 
75000000
[  261.107814] [DEBUG]ufshcd_devfreq_scale: freq 300000000 mapped to 
gear 4 , caller: ufshcd_devfreq_target+0x298/0x3e4
[  261.126922] [DEBUG]ufshcd_devfreq_scale: scaling UP gear from 1 -> 4
[  261.134810] [DEBUG]ufshcd_devfreq_target: updated target freq to 
300000000
[  261.196460] [DEBUG]ufshcd_devfreq_target: target freq = 244755397
[  261.210039] [DEBUG]ufshcd_devfreq_target: recommended freq = 300000000
[  261.216900] [DEBUG]ufshcd_devfreq_target: final freq = 300000000
[  261.223135] [DEBUG]ufshcd_devfreq_target: scaling DOWN from freq 
300000000 to freq 300000000
[  261.231872] ufshcd-qcom 1d84000.ufshc: 
ufshcd_is_devfreq_scaling_required: req_freq= 300000000, target_freq = 
300000000
[  261.243017] [DEBUG]ufshcd_devfreq_target: scaling DOWN from freq 
300000000 to freq 300000000 not required


.. G4 -> G2...

[  455.604414] [DEBUG]ufshcd_devfreq_target: target freq = 149736604
[  455.617895] [DEBUG]ufshcd_devfreq_target: recommended freq = 150000000
[  455.624702] [DEBUG]ufshcd_devfreq_target: final freq = 150000000
[  455.630936] [DEBUG]ufshcd_devfreq_target: scaling DOWN from freq 
300000000 to freq 150000000
[  455.639656] ufshcd-qcom 1d84000.ufshc: 
ufshcd_is_devfreq_scaling_required: req_freq= 150000000, target_freq = 
300000000
[  455.650838] [DEBUG]ufshcd_devfreq_scale: freq 150000000 mapped to 
gear 2 , caller: ufshcd_devfreq_target+0x298/0x3e4
[  455.661809] [DEBUG]ufshcd_devfreq_scale: scaling DOWN gear from 4 -> 2
[  455.670529] [DEBUG]ufshcd_devfreq_target: updated target freq to 
150000000


...G2 -> G1

[  548.484492] [DEBUG]ufshcd_devfreq_target: target freq = 75000000
[  548.497957] [DEBUG]ufshcd_devfreq_target: recommended freq = 75000000
[  548.504801] [DEBUG]ufshcd_devfreq_target: final freq = 75000000
[  548.510949] [DEBUG]ufshcd_devfreq_target: scaling DOWN from freq 
150000000 to freq 75000000
[  548.519590] ufshcd-qcom 1d84000.ufshc: 
ufshcd_is_devfreq_scaling_required: req_freq= 75000000, target_freq = 
150000000
[  548.530725] [DEBUG]ufshcd_devfreq_scale: freq 75000000 mapped to gear 
1 , caller: ufshcd_devfreq_target+0x298/0x3e4
[  548.552850] [DEBUG]ufshcd_devfreq_scale: scaling DOWN gear from 2 -> 1


-Ziqi

>>
>> v1 -> v2:
>> 1. Withdraw old patch 8/8 "ARM: dts: msm: Use Operation Points V2 for 
>> UFS on SM8650"
>> 2. Add new patch 8/8 "ABI: sysfs-driver-ufs: Add missing UFS sysfs 
>> addributes"
>> 3. Modify commit message for  "scsi: ufs: core: Pass target_freq to 
>> clk_scale_notify() vops" and "scsi: ufs: qcom: Pass target_freq to clk 
>> scale pre and post change"
>> 4. In "scsi: ufs: qcom: Pass target_freq to clk scale pre and post 
>> change", use common Macro HZ_PER_MHZ in function 
>> ufs_qcom_set_core_clk_ctrl()
>> 5. In "scsi: ufs: qcom: Implement the freq_to_gear_speed() vops", 
>> print out freq and gear info as debugging message
>> 6. In "scsi: ufs: core: Enable multi-level gear scaling", rename the 
>> lable "do_pmc" to "config_pwr_mode"
>> 7. In "scsi: ufs: core: Toggle Write Booster during clock", initialize 
>> the local variables "wb_en" as "false"
>>
>> Can Guo (6):
>>    scsi: ufs: core: Pass target_freq to clk_scale_notify() vops
>>    scsi: ufs: qcom: Pass target_freq to clk scale pre and post change
>>    scsi: ufs: core: Add a vops to map clock frequency to gear speed
>>    scsi: ufs: qcom: Implement the freq_to_gear_speed() vops
>>    scsi: ufs: core: Enable multi-level gear scaling
>>    scsi: ufs: core: Toggle Write Booster during clock scaling base on
>>      gear speed
>>
>> Ziqi Chen (2):
>>    scsi: ufs: core: Check if scaling up is required when disable clkscale
>>    ABI: sysfs-driver-ufs: Add missing UFS sysfs addributes
>>
>>   Documentation/ABI/testing/sysfs-driver-ufs | 31 ++++++++++
>>   drivers/ufs/core/ufshcd-priv.h             | 17 +++++-
>>   drivers/ufs/core/ufshcd.c                  | 71 ++++++++++++++++------
>>   drivers/ufs/host/ufs-mediatek.c            |  1 +
>>   drivers/ufs/host/ufs-qcom.c                | 66 +++++++++++++++-----
>>   include/ufs/ufshcd.h                       |  8 ++-
>>   6 files changed, 159 insertions(+), 35 deletions(-)
>>
> 

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