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Message-ID: <Z5MiIWZhXpUwQgnG@tassilo>
Date: Thu, 23 Jan 2025 21:16:17 -0800
From: Andi Kleen <ak@...ux.intel.com>
To: Dapeng Mi <dapeng1.mi@...ux.intel.com>
Cc: Peter Zijlstra <peterz@...radead.org>, Ingo Molnar <mingo@...hat.com>,
Arnaldo Carvalho de Melo <acme@...nel.org>,
Namhyung Kim <namhyung@...nel.org>, Ian Rogers <irogers@...gle.com>,
Adrian Hunter <adrian.hunter@...el.com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Kan Liang <kan.liang@...ux.intel.com>,
Eranian Stephane <eranian@...gle.com>, linux-kernel@...r.kernel.org,
linux-perf-users@...r.kernel.org, Dapeng Mi <dapeng1.mi@...el.com>
Subject: Re: [PATCH 13/20] perf/x86/intel: Add SSP register support for
arch-PEBS
> diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
> index f40b03adb5c7..7ed80f01f15d 100644
> --- a/arch/x86/events/core.c
> +++ b/arch/x86/events/core.c
> @@ -646,6 +646,16 @@ int x86_pmu_hw_config(struct perf_event *event)
> return -EINVAL;
> }
>
> + /* sample_regs_user never support SSP register. */
> + if (unlikely(event->attr.sample_regs_user & BIT_ULL(PERF_REG_X86_SSP)))
> + return -EINVAL;
Why not? It's somewhere.
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