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Message-ID: <20250125035920.2651972-3-quic_mmanikan@quicinc.com>
Date: Sat, 25 Jan 2025 09:29:18 +0530
From: Manikanta Mylavarapu <quic_mmanikan@...cinc.com>
To: <andersson@...nel.org>, <mturquette@...libre.com>, <sboyd@...nel.org>,
        <robh@...nel.org>, <krzk+dt@...nel.org>, <conor+dt@...nel.org>,
        <lpieralisi@...nel.org>, <kw@...ux.com>,
        <manivannan.sadhasivam@...aro.org>, <bhelgaas@...gle.com>,
        <konradybcio@...nel.org>, <linux-arm-msm@...r.kernel.org>,
        <linux-clk@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <linux-pci@...r.kernel.org>
CC: <quic_srichara@...cinc.com>, <quic_varada@...cinc.com>
Subject: [PATCH v3 2/4] dt-bindings: clock: update interconnect cells for ipq5424

Interconnect cells differ between the IPQ5332 and IPQ5424.
Therefore, update the interconnect cells according to the SoC.

Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@...cinc.com>
---
 .../devicetree/bindings/clock/qcom,ipq5332-gcc.yaml       | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml
index 1230183fc0a9..fac7922d2473 100644
--- a/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml
@@ -35,8 +35,6 @@ properties:
       - description: PCIE 2-lane PHY3 pipe clock source
 
   '#power-domain-cells': false
-  '#interconnect-cells':
-    const: 1
 
 required:
   - compatible
@@ -54,6 +52,9 @@ allOf:
         clocks:
           maxItems: 5
 
+        '#interconnect-cells':
+          const: 1
+
   - if:
       properties:
         compatible:
@@ -65,6 +66,9 @@ allOf:
           minItems: 7
           maxItems: 7
 
+        '#interconnect-cells':
+          const: 2
+
 unevaluatedProperties: false
 
 examples:
-- 
2.34.1


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