linux-kernel - Re: [PATCH v5 -next 03/11] irqchip: Add Broadcom bcm2712 MSI-X interrupt controller

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Message-ID: <87bjvs86w8.ffs@tglx>
Date: Mon, 27 Jan 2025 19:10:31 +0100
From: Thomas Gleixner <tglx@...utronix.de>
To: Stanimir Varbanov <svarbanov@...e.de>, linux-kernel@...r.kernel.org,
 devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
 linux-rpi-kernel@...ts.infradead.org, linux-pci@...r.kernel.org, Broadcom
 internal kernel review list <bcm-kernel-feedback-list@...adcom.com>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>, Florian Fainelli
 <florian.fainelli@...adcom.com>, Jim Quinlan <jim2101024@...il.com>,
 Nicolas Saenz Julienne <nsaenz@...nel.org>, Bjorn Helgaas
 <bhelgaas@...gle.com>, Lorenzo Pieralisi <lpieralisi@...nel.org>,
 kw@...ux.com, Philipp Zabel <p.zabel@...gutronix.de>, Andrea della Porta
 <andrea.porta@...e.com>, Phil Elwell <phil@...pberrypi.com>, Jonathan Bell
 <jonathan@...pberrypi.com>, Dave Stevenson
 <dave.stevenson@...pberrypi.com>, Stanimir Varbanov <svarbanov@...e.de>
Subject: Re: [PATCH v5 -next 03/11] irqchip: Add Broadcom bcm2712 MSI-X
 interrupt controller

On Mon, Jan 20 2025 at 15:01, Stanimir Varbanov wrote:

> Add an interrupt controller driver for MSI-X Interrupt Peripheral (MIP)
> hardware block found in bcm2712. The interrupt controller is used to
> handle MSI-X interrupts from peripherials behind PCIe endpoints like
> RP1 south bridge found in RPi5.
>
> There are two MIPs on bcm2712, the first has 64 consecutive SPIs
> assigned to 64 output vectors, and the second has 17 SPIs, but only
> 8 of them are consecutive starting at the 8th output vector.
>
> Signed-off-by: Stanimir Varbanov <svarbanov@...e.de>

Reviewed-by: Thomas Gleixner <tglx@...utronix.de>

As this is a new controller and required for the actual PCI muck, I
think the best way is to take it through the PCI tree, unless someone
wants me to pick the whole lot up.

Thanks,

        tglx