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Message-ID: <20250128033226.70866-2-Tristram.Ha@microchip.com>
Date: Mon, 27 Jan 2025 19:32:25 -0800
From: <Tristram.Ha@...rochip.com>
To: Woojung Huh <woojung.huh@...rochip.com>, Andrew Lunn <andrew@...n.ch>,
Vladimir Oltean <olteanv@...il.com>, Heiner Kallweit <hkallweit1@...il.com>,
Russell King <linux@...linux.org.uk>, Maxime Chevallier
<maxime.chevallier@...tlin.com>
CC: "David S. Miller" <davem@...emloft.net>, Eric Dumazet
<edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>, Paolo Abeni
<pabeni@...hat.com>, <UNGLinuxDriver@...rochip.com>,
<netdev@...r.kernel.org>, <linux-kernel@...r.kernel.org>, Tristram Ha
<tristram.ha@...rochip.com>
Subject: [PATCH RFC net-next 1/2] net: pcs: xpcs: Add special code to operate in Microchip KSZ9477 switch
From: Tristram Ha <tristram.ha@...rochip.com>
It was recommended to use this XPCS driver for Microchip KSZ9477 switch
to operate its SGMII port as the SGMII implementation uses the same
Synopsys DesignWare IP, but current code does not work in some cases.
The only solution is to add a quirk field and use that to operate KSZ
specific code.
For 1000BaseX mode setting neg_mode to false works, but that does not
work for SGMII mode. Setting 0x18 value in register 0x1f8001 allows
1000BaseX mode to work with auto-negotiation enabled.
However SGMII mode in KSZ9477 has a bug in which the current speed
needs to be set in MII_BMCR to pass traffic. The current driver code
does not do anything when link is up with auto-negotiation enabled, so
that code needs to be changed for KSZ9477.
Signed-off-by: Tristram Ha <tristram.ha@...rochip.com>
---
drivers/net/pcs/pcs-xpcs.c | 52 ++++++++++++++++++++++++++++++++++--
drivers/net/pcs/pcs-xpcs.h | 2 ++
include/linux/pcs/pcs-xpcs.h | 6 +++++
3 files changed, 58 insertions(+), 2 deletions(-)
diff --git a/drivers/net/pcs/pcs-xpcs.c b/drivers/net/pcs/pcs-xpcs.c
index 1faa37f0e7b9..ddf6cd4b37a7 100644
--- a/drivers/net/pcs/pcs-xpcs.c
+++ b/drivers/net/pcs/pcs-xpcs.c
@@ -768,6 +768,14 @@ static int xpcs_config_aneg_c37_1000basex(struct dw_xpcs *xpcs,
val |= DW_VR_MII_AN_INTR_EN;
}
+ if (xpcs->quirk == DW_XPCS_QUIRK_MICROCHIP_KSZ &&
+ neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) {
+ mask |= DW_VR_MII_SGMII_LINK_STS | DW_VR_MII_TX_CONFIG_MASK;
+ val |= FIELD_PREP(DW_VR_MII_TX_CONFIG_MASK,
+ DW_VR_MII_TX_CONFIG_PHY_SIDE_SGMII);
+ val |= DW_VR_MII_SGMII_LINK_STS;
+ }
+
ret = xpcs_modify(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_CTRL, mask, val);
if (ret < 0)
return ret;
@@ -982,6 +990,15 @@ static int xpcs_get_state_c37_sgmii(struct dw_xpcs *xpcs,
if (ret < 0)
return ret;
+ /* DW_VR_MII_AN_STS_C37_ANCMPLT_INTR just means link change in SGMII
+ * mode, so needs to be cleared. It can appear just by itself, which
+ * does not mean the link is up.
+ */
+ if (xpcs->quirk == DW_XPCS_QUIRK_MICROCHIP_KSZ &&
+ (ret & DW_VR_MII_AN_STS_C37_ANCMPLT_INTR)) {
+ ret &= ~DW_VR_MII_AN_STS_C37_ANCMPLT_INTR;
+ xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_INTR_STS, 0);
+ }
if (ret & DW_VR_MII_C37_ANSGM_SP_LNKSTS) {
int speed_value;
@@ -1037,6 +1054,18 @@ static int xpcs_get_state_c37_1000basex(struct dw_xpcs *xpcs,
{
int lpa, bmsr;
+ /* DW_VR_MII_AN_STS_C37_ANCMPLT_INTR just means link change, so needs
+ * to be cleared. If polling is not used then it is cleared by
+ * following code.
+ */
+ if (xpcs->quirk == DW_XPCS_QUIRK_MICROCHIP_KSZ && xpcs->pcs.poll) {
+ int val;
+
+ val = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_INTR_STS);
+ if (val & DW_VR_MII_AN_STS_C37_ANCMPLT_INTR)
+ xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_INTR_STS,
+ 0);
+ }
if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
state->advertising)) {
/* Reset link state */
@@ -1138,9 +1167,14 @@ static void xpcs_link_up_sgmii_1000basex(struct dw_xpcs *xpcs,
phy_interface_t interface,
int speed, int duplex)
{
+ u16 val = 0;
int ret;
- if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)
+ /* Microchip KSZ SGMII implementation has a bug that needs MII_BMCR
+ * register to be updated with current speed to pass traffic.
+ */
+ if (xpcs->quirk != DW_XPCS_QUIRK_MICROCHIP_KSZ &&
+ neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)
return;
if (interface == PHY_INTERFACE_MODE_1000BASEX) {
@@ -1155,10 +1189,18 @@ static void xpcs_link_up_sgmii_1000basex(struct dw_xpcs *xpcs,
dev_err(&xpcs->mdiodev->dev,
"%s: half duplex not supported\n",
__func__);
+
+ /* No need to update MII_BMCR register if not in SGMII mode. */
+ if (xpcs->quirk == DW_XPCS_QUIRK_MICROCHIP_KSZ &&
+ neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)
+ return;
}
+ if (xpcs->quirk == DW_XPCS_QUIRK_MICROCHIP_KSZ &&
+ neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)
+ val = BMCR_ANENABLE;
ret = xpcs_write(xpcs, MDIO_MMD_VEND2, MII_BMCR,
- mii_bmcr_encode_fixed(speed, duplex));
+ val | mii_bmcr_encode_fixed(speed, duplex));
if (ret)
dev_err(&xpcs->mdiodev->dev, "%s: xpcs_write returned %pe\n",
__func__, ERR_PTR(ret));
@@ -1563,5 +1605,11 @@ void xpcs_destroy_pcs(struct phylink_pcs *pcs)
}
EXPORT_SYMBOL_GPL(xpcs_destroy_pcs);
+void xpcs_set_quirk(struct dw_xpcs *xpcs, int quirk)
+{
+ xpcs->quirk = quirk;
+}
+EXPORT_SYMBOL_GPL(xpcs_set_quirk);
+
MODULE_DESCRIPTION("Synopsys DesignWare XPCS library");
MODULE_LICENSE("GPL v2");
diff --git a/drivers/net/pcs/pcs-xpcs.h b/drivers/net/pcs/pcs-xpcs.h
index adc5a0b3c883..1348a9a05ca6 100644
--- a/drivers/net/pcs/pcs-xpcs.h
+++ b/drivers/net/pcs/pcs-xpcs.h
@@ -73,6 +73,7 @@
/* VR_MII_AN_CTRL */
#define DW_VR_MII_AN_CTRL_8BIT BIT(8)
+#define DW_VR_MII_SGMII_LINK_STS BIT(4)
#define DW_VR_MII_TX_CONFIG_MASK BIT(3)
#define DW_VR_MII_TX_CONFIG_PHY_SIDE_SGMII 0x1
#define DW_VR_MII_TX_CONFIG_MAC_SIDE_SGMII 0x0
@@ -122,6 +123,7 @@ struct dw_xpcs {
struct phylink_pcs pcs;
phy_interface_t interface;
bool need_reset;
+ int quirk;
};
int xpcs_read(struct dw_xpcs *xpcs, int dev, u32 reg);
diff --git a/include/linux/pcs/pcs-xpcs.h b/include/linux/pcs/pcs-xpcs.h
index 733f4ddd2ef1..7fccbff2383d 100644
--- a/include/linux/pcs/pcs-xpcs.h
+++ b/include/linux/pcs/pcs-xpcs.h
@@ -41,6 +41,10 @@ enum dw_xpcs_pma_id {
WX_TXGBE_XPCS_PMA_10G_ID = 0x0018fc80,
};
+enum dw_xpcs_quirks {
+ DW_XPCS_QUIRK_MICROCHIP_KSZ = 1,
+};
+
struct dw_xpcs_info {
u32 pcs;
u32 pma;
@@ -59,4 +63,6 @@ void xpcs_destroy(struct dw_xpcs *xpcs);
struct phylink_pcs *xpcs_create_pcs_mdiodev(struct mii_bus *bus, int addr);
void xpcs_destroy_pcs(struct phylink_pcs *pcs);
+void xpcs_set_quirk(struct dw_xpcs *xpcs, int quirk);
+
#endif /* __LINUX_PCS_XPCS_H */
--
2.34.1
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