lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <d711e970-2f55-46b0-9ff7-ed49dd885c26@microchip.com>
Date: Tue, 28 Jan 2025 04:44:07 +0000
From: <Manikandan.M@...rochip.com>
To: <Nicolas.Ferre@...rochip.com>, <sam@...nborg.org>,
	<bbrezillon@...nel.org>, <maarten.lankhorst@...ux.intel.com>,
	<mripard@...nel.org>, <tzimmermann@...e.de>, <airlied@...il.com>,
	<simona@...ll.ch>, <alexandre.belloni@...tlin.com>,
	<claudiu.beznea@...on.dev>, <dri-devel@...ts.freedesktop.org>,
	<linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] drm: atmel-hlcdc: update the LCDC_ATTRE register in plane
 atomic_disable

Hi,

A gentle reminder to merge this patch. Let me know if any further 
changes are needed.

On 14/10/24 3:14 pm, Nicolas Ferre wrote:
> On 14/10/2024 at 08:46, Manikandan Muralidharan wrote:
>> update the LCDC_ATTRE register in drm plane atomic_disable to handle
>> the configuration changes of each layer when a plane is disabled.
>>
>> Signed-off-by: Manikandan Muralidharan <manikandan.m@...rochip.com>
> 
> Reviewed-by: Nicolas Ferre <nicolas.ferre@...rochip.com>
> 
> Thanks Mani. Best regards,
>    Nicolas
> 
>> ---
>>   drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h    |  3 ++-
>>   drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 17 ++++++++++++++---
>>   2 files changed, 16 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h 
>> b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h
>> index e1a0bb24b511..53d47f01db0b 100644
>> --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h
>> +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h
>> @@ -378,7 +378,8 @@ struct atmel_lcdc_dc_ops {
>>       void (*lcdc_update_buffers)(struct atmel_hlcdc_plane *plane,
>>                       struct atmel_hlcdc_plane_state *state,
>>                       u32 sr, int i);
>> -    void (*lcdc_atomic_disable)(struct atmel_hlcdc_plane *plane);
>> +    void (*lcdc_atomic_disable)(struct atmel_hlcdc_plane *plane,
>> +                    struct atmel_hlcdc_dc *dc);
>>       void (*lcdc_update_general_settings)(struct atmel_hlcdc_plane 
>> *plane,
>>                            struct atmel_hlcdc_plane_state *state);
>>       void (*lcdc_atomic_update)(struct atmel_hlcdc_plane *plane,
>> diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c 
>> b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
>> index 4a7ba0918eca..4bcaf2cd7672 100644
>> --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
>> +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
>> @@ -816,7 +816,8 @@ static int atmel_hlcdc_plane_atomic_check(struct 
>> drm_plane *p,
>>       return 0;
>>   }
>> -static void atmel_hlcdc_atomic_disable(struct atmel_hlcdc_plane *plane)
>> +static void atmel_hlcdc_atomic_disable(struct atmel_hlcdc_plane *plane,
>> +                       struct atmel_hlcdc_dc *dc)
>>   {
>>       /* Disable interrupts */
>>       atmel_hlcdc_layer_write_reg(&plane->layer, ATMEL_HLCDC_LAYER_IDR,
>> @@ -832,7 +833,8 @@ static void atmel_hlcdc_atomic_disable(struct 
>> atmel_hlcdc_plane *plane)
>>       atmel_hlcdc_layer_read_reg(&plane->layer, ATMEL_HLCDC_LAYER_ISR);
>>   }
>> -static void atmel_xlcdc_atomic_disable(struct atmel_hlcdc_plane *plane)
>> +static void atmel_xlcdc_atomic_disable(struct atmel_hlcdc_plane *plane,
>> +                       struct atmel_hlcdc_dc *dc)
>>   {
>>       /* Disable interrupts */
>>       atmel_hlcdc_layer_write_reg(&plane->layer, ATMEL_XLCDC_LAYER_IDR,
>> @@ -842,6 +844,15 @@ static void atmel_xlcdc_atomic_disable(struct 
>> atmel_hlcdc_plane *plane)
>>       atmel_hlcdc_layer_write_reg(&plane->layer,
>>                       ATMEL_XLCDC_LAYER_ENR, 0);
>> +    /*
>> +     * Updating XLCDC_xxxCFGx, XLCDC_xxxFBA and XLCDC_xxxEN,
>> +     * (where xxx indicates each layer) requires writing one to the
>> +     * Update Attribute field for each layer in LCDC_ATTRE register 
>> for SAM9X7.
>> +     */
>> +    regmap_write(dc->hlcdc->regmap, ATMEL_XLCDC_ATTRE, 
>> ATMEL_XLCDC_BASE_UPDATE |
>> +             ATMEL_XLCDC_OVR1_UPDATE | ATMEL_XLCDC_OVR3_UPDATE |
>> +             ATMEL_XLCDC_HEO_UPDATE);
>> +
>>       /* Clear all pending interrupts */
>>       atmel_hlcdc_layer_read_reg(&plane->layer, ATMEL_XLCDC_LAYER_ISR);
>>   }
>> @@ -852,7 +863,7 @@ static void 
>> atmel_hlcdc_plane_atomic_disable(struct drm_plane *p,
>>       struct atmel_hlcdc_plane *plane = 
>> drm_plane_to_atmel_hlcdc_plane(p);
>>       struct atmel_hlcdc_dc *dc = plane->base.dev->dev_private;
>> -    dc->desc->ops->lcdc_atomic_disable(plane);
>> +    dc->desc->ops->lcdc_atomic_disable(plane, dc);
>>   }
>>   static void atmel_hlcdc_atomic_update(struct atmel_hlcdc_plane *plane,
> 

-- 
Thanks and Regards,
Manikandan M.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ