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Message-ID: <22a8d1ce-40cd-4cb9-9acc-0058f34c2b37@kernel.org>
Date: Tue, 28 Jan 2025 08:30:37 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Manikanta Mylavarapu <quic_mmanikan@...cinc.com>
Cc: andersson@...nel.org, mturquette@...libre.com, sboyd@...nel.org,
 robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org,
 lpieralisi@...nel.org, kw@...ux.com, manivannan.sadhasivam@...aro.org,
 bhelgaas@...gle.com, konradybcio@...nel.org, linux-arm-msm@...r.kernel.org,
 linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org,
 quic_srichara@...cinc.com, quic_varada@...cinc.com
Subject: Re: [PATCH v3 1/4] dt-bindings: PCI: qcom: add global interrupt for
 ipq5424

On 27/01/2025 08:25, Krzysztof Kozlowski wrote:
> On Sat, Jan 25, 2025 at 09:29:17AM +0530, Manikanta Mylavarapu wrote:
>> Document the global interrupt found on IPQ5424 platform.
>>
>> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@...cinc.com>
>> ---
>>  Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 6 ++++--
>>  1 file changed, 4 insertions(+), 2 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
>> index 7235d6554cfb..1fd6aea08bf0 100644
>> --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
>> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
>> @@ -49,11 +49,11 @@ properties:
>>  
>>    interrupts:
>>      minItems: 1
>> -    maxItems: 8
>> +    maxItems: 9
>>  
>>    interrupt-names:
>>      minItems: 1
>> -    maxItems: 8
>> +    maxItems: 9
> 
> You just added it for few other devices as well, like sdm845. If you
> raise one part of constrain, then you need to correct each block where
> old constrain was implied.

And before you send new version, be 100% sure:
1. You observe the merge window
2. You sync with other people, so you finally stop sending the same
multiple times. Including sending the same *MISTAKE* and asking for the
same *REVIEW*.

The conflicting work from the SAME company or even team is ridiculous.
It is not the maintainer's task to coordinate your tasks and what your
colleagues are sending!

I am not going to review any Qualcomm PCI and PHY patches for the
remaining time of merge window and the next week which is usually busy
time for picking up patches.

Best regards,
Krzysztof

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