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Message-ID: <20250128120745.334377-10-christian.bruel@foss.st.com>
Date: Tue, 28 Jan 2025 13:07:44 +0100
From: Christian Bruel <christian.bruel@...s.st.com>
To: <christian.bruel@...s.st.com>, <bhelgaas@...gle.com>,
        <lpieralisi@...nel.org>, <kw@...ux.com>,
        <manivannan.sadhasivam@...aro.org>, <robh@...nel.org>,
        <krzk+dt@...nel.org>, <conor+dt@...nel.org>,
        <mcoquelin.stm32@...il.com>, <alexandre.torgue@...s.st.com>,
        <jingoohan1@...il.com>, <p.zabel@...gutronix.de>,
        <johan+linaro@...nel.org>, <quic_schintav@...cinc.com>,
        <cassel@...nel.org>
CC: <linux-pci@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-stm32@...md-mailman.stormreply.com>,
        <linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
        <fabrice.gasnier@...s.st.com>
Subject: [PATCH v4 09/10] arm64: dts: st: Add PCIe Endpoint mode on stm32mp251

Add pcie_ep node to support STM32 MP25 PCIe driver based on the
DesignWare PCIe core configured as Endpoint mode

Signed-off-by: Christian Bruel <christian.bruel@...s.st.com>
---
 arch/arm64/boot/dts/st/stm32mp251.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi
index 6cd1a765fac9..07c2d2c386f4 100644
--- a/arch/arm64/boot/dts/st/stm32mp251.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi
@@ -909,6 +909,19 @@ stmmac_axi_config_1: stmmac-axi-config {
 				};
 			};
 
+			pcie_ep: pcie-ep@...00000 {
+				compatible = "st,stm32mp25-pcie-ep";
+				reg = <0x48400000 0x400000>,
+				      <0x10000000 0x8000000>;
+				reg-names = "dbi", "addr_space";
+				clocks = <&rcc CK_BUS_PCIE>;
+				resets = <&rcc PCIE_R>;
+				phys = <&combophy PHY_TYPE_PCIE>;
+				access-controllers = <&rifsc 68>;
+				power-domains = <&CLUSTER_PD>;
+				status = "disabled";
+			};
+
 			pcie_rc: pcie@...00000 {
 				compatible = "st,stm32mp25-pcie-rc";
 				device_type = "pci";
@@ -931,6 +944,7 @@ pcie_rc: pcie@...00000 {
 				resets = <&rcc PCIE_R>;
 				msi-parent = <&v2m0>;
 				access-controllers = <&rifsc 68>;
+				power-domains = <&CLUSTER_PD>;
 				status = "disabled";
 
 				pcie@0,0 {
@@ -942,6 +956,8 @@ pcie@0,0 {
 					ranges;
 				};
 			};
+
+
 		};
 
 		bsec: efuse@...00000 {
-- 
2.34.1


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