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Message-ID: <63e64aa6-d018-4e45-acc7-f9d88a7db60f@lunn.ch>
Date: Tue, 28 Jan 2025 14:48:49 +0100
From: Andrew Lunn <andrew@...n.ch>
To: Swathi K S <swathi.ks@...sung.com>
Cc: krzk@...nel.org, robh@...nel.org, davem@...emloft.net,
	edumazet@...gle.com, kuba@...nel.org, pabeni@...hat.com,
	conor+dt@...nel.org, richardcochran@...il.com,
	mcoquelin.stm32@...il.com, alim.akhtar@...sung.com,
	linux-fsd@...la.com, netdev@...r.kernel.org,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-stm32@...md-mailman.stormreply.com,
	linux-arm-kernel@...ts.infradead.org,
	linux-samsung-soc@...r.kernel.org, alexandre.torgue@...s.st.com,
	peppe.cavallaro@...com, joabreu@...opsys.com, rcsekar@...sung.com,
	ssiddha@...la.com, jayati.sahu@...sung.com,
	pankaj.dubey@...sung.com, ravi.patel@...sung.com,
	gost.dev@...sung.com
Subject: Re: [PATCH v5 2/4] net: stmmac: dwc-qos: Add FSD EQoS support

> +static int fsd_clks_endisable(void *priv, bool enabled)
> +{
> +	struct fsd_eqos_plat_data *plat = priv;
> +
> +	if (enabled) {
> +		return clk_bulk_prepare_enable(plat->num_clks, plat->clks);
> +	} else {
> +		clk_bulk_disable_unprepare(plat->num_clks, plat->clks);
> +		return 0;
> +	}
> +}
> +
> +static int fsd_eqos_probe(struct platform_device *pdev,
> +			  struct plat_stmmacenet_data *data,
> +			  struct stmmac_resources *res)
> +{
> +	struct fsd_eqos_plat_data *priv_plat;
> +	struct clk *rx1 = NULL;
> +	struct clk *rx2 = NULL;
> +	int ret = 0;
> +
> +	priv_plat = devm_kzalloc(&pdev->dev, sizeof(*priv_plat), GFP_KERNEL);
> +	if (!priv_plat)
> +		return -ENOMEM;
> +
> +	priv_plat->dev = &pdev->dev;
> +
> +	ret = devm_clk_bulk_get_all(&pdev->dev, &priv_plat->clks);
> +	if (ret < 0)
> +		return dev_err_probe(&pdev->dev, ret, "No clocks available\n");
> +
> +	priv_plat->num_clks = ret;

It looks like you should be able to share all the clk_bulk code with
tegra_eqos_probe(). The stmmac driver suffers from lots of cut/paste
code with no consolidation. You can at least not make the tegra code
worse by doing a little refactoring.

	Andrew

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