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Message-ID: <CACRpkdYbSOHD9UH5=+qjztxS3Cq_rxaoOT9tFtD8ZWm9zQGnPw@mail.gmail.com>
Date: Tue, 28 Jan 2025 17:03:23 +0100
From: Linus Walleij <linus.walleij@...aro.org>
To: Yixun Lan <dlan@...too.org>
Cc: Rob Herring <robh@...nel.org>, Olof Johansson <olof@...om.net>, Bartosz Golaszewski <brgl@...ev.pl>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
Conor Dooley <conor@...nel.org>, Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>, Yangyu Chen <cyy@...self.name>,
Jisheng Zhang <jszhang@...nel.org>, Jesse Taube <mr.bossman075@...il.com>,
Inochi Amaoto <inochiama@...look.com>, Icenowy Zheng <uwu@...nowy.me>,
Meng Zhang <zhangmeng.kevin@...ux.spacemit.com>, linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-riscv@...ts.infradead.org
Subject: Re: [PATCH v4 1/4] dt-bindings: gpio: spacemit: add support for K1 SoC
On Tue, Jan 28, 2025 at 4:17 AM Yixun Lan <dlan@...too.org> wrote:
> [Rob]
> > If Linux can't handle 1 node for N gpio_chip's, then that's a Linux
> > problem. Maybe it can, IDK.
>
> I haven't seen somthing like this to register 1 node for multi gpio_chips..
> To gpio/pinctrl maintainer (Linus Walleij), do you have suggestion on this?
For Linux we can call bgpio_init() three times and
devm_gpiochip_add_data() three times on the result and if we use the
approach with three cells (where the second is instance 0,1,2 and the
last one the offset 0..31) then it will work all just the same I guess?
foo-gpios <&gpio 2 7 GPIO_ACTIVE_LOW>;
for offset 7 on block 2 for example.
We need a custom xlate function I suppose.
It just has not been done that way before, everybody just did
2-cell GPIOs.
Yours,
Linus Walleij
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