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Message-ID: <yxvmnrpa7r55n6l3jf5wpkikd5iqtwjm5n56mqnxw65nboi5js@svaj72pzsevn>
Date: Thu, 30 Jan 2025 00:07:37 +0200
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Jessica Zhang <quic_jesszhan@...cinc.com>
Cc: Rob Clark <robdclark@...il.com>, quic_abhinavk@...cinc.com,
Sean Paul <sean@...rly.run>, Marijn Suijten <marijn.suijten@...ainline.org>,
David Airlie <airlied@...il.com>, Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Maxime Ripard <mripard@...nel.org>, Thomas Zimmermann <tzimmermann@...e.de>,
Simona Vetter <simona@...ll.ch>, Simona Vetter <simona.vetter@...ll.ch>,
quic_ebharadw@...cinc.com, linux-arm-msm@...r.kernel.org, dri-devel@...ts.freedesktop.org,
freedreno@...ts.freedesktop.org, linux-kernel@...r.kernel.org, Rob Clark <robdclark@...omium.org>,
Ville Syrjälä <ville.syrjala@...ux.intel.com>
Subject: Re: [PATCH v5 06/14] drm/msm/dpu: Fail atomic_check if multiple
outputs request CDM block
On Tue, Jan 28, 2025 at 07:20:38PM -0800, Jessica Zhang wrote:
> Currently, our hardware only supports a single output using CDM block at
> most. Because of this, we cannot support cases where both writeback and DP
> output request CDM simultaneously
>
> To avoid this happening when CWB is enabled, change
> msm_display_topoloy.needs_cdm into a cdm_requested counter to track how
> many outputs are requesting CDM block. Return EINVAL if multiple outputs
> are trying to reserve CDM.
>
> Signed-off-by: Jessica Zhang <quic_jesszhan@...cinc.com>
> ---
> Changes in v5:
> - Changed check to fail only if multiple outputs are requesting CDM
> simultaneously
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 4 ++--
> drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 12 +++++++++---
> drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 5 +++--
> 3 files changed, 14 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> index bd6fef8eb8f267cde4ebe1155be39ce69e786967..99db194f5d095e83ac72f2830814e649a25918ef 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> @@ -692,10 +692,10 @@ void dpu_encoder_update_topology(struct drm_encoder *drm_enc,
> fb = conn_state->writeback_job->fb;
>
> if (fb && MSM_FORMAT_IS_YUV(msm_framebuffer_format(fb)))
> - topology->needs_cdm = true;
> + topology->cdm_requested++;
> } else if (disp_info->intf_type == INTF_DP) {
> if (msm_dp_is_yuv_420_enabled(priv->dp[disp_info->h_tile_instance[0]], adj_mode))
> - topology->needs_cdm = true;
> + topology->cdm_requested++;
> }
> }
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
> index 0fbb92021b184c4792ddfe059e98b3acf7bc7cc6..dca3107d1e8265a864ac62d6b845d6cb966965ed 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
> @@ -585,7 +585,8 @@ static int _dpu_rm_reserve_dsc(struct dpu_rm *rm,
>
> static int _dpu_rm_reserve_cdm(struct dpu_rm *rm,
> struct dpu_global_state *global_state,
> - uint32_t crtc_id)
> + uint32_t crtc_id,
> + const struct msm_display_topology *top)
I think it's enough to pass num_cdm.
> {
> /* try allocating only one CDM block */
> if (!rm->cdm_blk) {
> @@ -593,6 +594,11 @@ static int _dpu_rm_reserve_cdm(struct dpu_rm *rm,
> return -EIO;
> }
>
> + if (top->cdm_requested > 1) {
> + DPU_ERROR("More than 1 INTF requesting CDM\n");
> + return -EINVAL;
> + }
> +
> if (global_state->cdm_to_crtc_id) {
> DPU_ERROR("CDM_0 is already allocated\n");
> return -EIO;
> @@ -629,8 +635,8 @@ static int _dpu_rm_make_reservation(
> if (ret)
> return ret;
>
> - if (topology->needs_cdm) {
> - ret = _dpu_rm_reserve_cdm(rm, global_state, crtc_id);
> + if (topology->cdm_requested > 0) {
> + ret = _dpu_rm_reserve_cdm(rm, global_state, crtc_id, topology);
> if (ret) {
> DPU_ERROR("unable to find CDM blk\n");
> return ret;
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
> index b854e42d319d2c482e4e1732239754979f6950dd..7716c226cd7a270a1bac052dc085f5ed84cb9c26 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
> @@ -51,7 +51,8 @@ struct dpu_rm_sspp_requirements {
> * @num_intf: number of interfaces the panel is mounted on
> * @num_dspp: number of dspp blocks used
> * @num_dsc: number of Display Stream Compression (DSC) blocks used
> - * @needs_cdm: indicates whether cdm block is needed for this display topology
> + * @cdm_requested: indicates how many outputs are requesting cdm block for
> + * this display topology
> * @cwb_enabled: indicates whether CWB is enabled for this display topology
> */
> struct msm_display_topology {
> @@ -59,7 +60,7 @@ struct msm_display_topology {
> u32 num_intf;
> u32 num_dspp;
> u32 num_dsc;
> - bool needs_cdm;
> + int cdm_requested;
u32 num_cdm, please.
> bool cwb_enabled;
> };
>
>
> --
> 2.34.1
>
--
With best wishes
Dmitry
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