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Message-ID: <CAMuHMdX4O2UaLaijREMV5VyGzES9JkmWVSLHeN1WkPDTpyAhoA@mail.gmail.com>
Date: Wed, 29 Jan 2025 16:00:40 +0100
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: John Madieu <john.madieu.xa@...renesas.com>
Cc: krzk+dt@...nel.org, robh@...nel.org, biju.das.jz@...renesas.com, 
	claudiu.beznea.uj@...renesas.com, conor+dt@...nel.org, 
	devicetree@...r.kernel.org, john.madieu@...il.com, 
	linux-kernel@...r.kernel.org, linux-renesas-soc@...r.kernel.org, 
	magnus.damm@...il.com
Subject: Re: [PATCH v5 3/5] soc: renesas: rz-sysc: Add support for RZ/G3E family

On Tue, 28 Jan 2025 at 04:14, John Madieu <john.madieu.xa@...renesas.com> wrote:
> Add SoC detection support for RZ/G3E SoC. Also add support for detecting
> the number of cores and ETHOS-U55 NPU and also detect PLL mismatch for SW
> settings other than 1.7GHz.
>
> Signed-off-by: John Madieu <john.madieu.xa@...renesas.com>
> ---
> Changes in v5:
> - Avoided using common include file for register definition for both RZ/G3E and RZ/V2H
> - Do not use macro for register definitions
> - Do not use a variable per line while printing messages

Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
i.e. will queue in renesas-devel for v6.15.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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