linux-kernel - [PATCH 0/3] Cleanup for Intel PMU initialization

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Message-Id: <20250129154820.3755948-1-kan.liang@linux.intel.com>
Date: Wed, 29 Jan 2025 07:48:17 -0800
From: kan.liang@...ux.intel.com
To: peterz@...radead.org,
	mingo@...hat.com,
	acme@...nel.org,
	namhyung@...nel.org,
	irogers@...gle.com,
	adrian.hunter@...el.com,
	alexander.shishkin@...ux.intel.com,
	ak@...ux.intel.com,
	linux-kernel@...r.kernel.org
Cc: dapeng1.mi@...ux.intel.com,
	Kan Liang <kan.liang@...ux.intel.com>
Subject: [PATCH 0/3] Cleanup for Intel PMU initialization

From: Kan Liang <kan.liang@...ux.intel.com>

The patches are to clean up different features. They all touch the
initialization code. There are some dependencies. So I put them in
a patch set to facilitate the review and merge.

Patch 1 is to clear up the PEBS-via-PT on hybrid.
The original V1 patch can be found at
https://lore.kernel.org/lkml/20250124183432.3565061-1-kan.liang@linux.intel.com/
This is the V2, which only update the comments.

Patch 2 is to clean up the 023H enumeration.
To close the discussion at
https://lore.kernel.org/lkml/20250127212901.GB9557@noisy.programming.kicks-ass.net/

Patch 3 is to clean up the counter information update and check codes.
To close the discussion at
https://lore.kernel.org/lkml/20250127164406.GN16742@noisy.programming.kicks-ass.net/

Kan Liang (3):
  perf/x86/intel: Clean up PEBS-via-PT on hybrid
  perf/x86/intel: Fix ARCH_PERFMON_NUM_COUNTER_LEAF
  perf/x86/intel: Clean up counter information update and check

 arch/x86/events/core.c            |  10 +--
 arch/x86/events/intel/core.c      | 134 +++++++++++++++---------------
 arch/x86/events/intel/ds.c        |  10 ++-
 arch/x86/events/perf_event.h      |   1 +
 arch/x86/include/asm/perf_event.h |  28 ++++++-
 5 files changed, 106 insertions(+), 77 deletions(-)

-- 
2.38.1