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Message-ID: <bbdf57b8-60e7-4f73-b597-edbbee641fcb@foss.st.com>
Date: Thu, 30 Jan 2025 10:48:07 +0100
From: Patrice CHOTARD <patrice.chotard@...s.st.com>
To: Krzysztof Kozlowski <krzk@...nel.org>, Conor Dooley <conor@...nel.org>
CC: Mark Brown <broonie@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof
Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Alexandre
Torgue <alexandre.torgue@...s.st.com>,
Philipp Zabel
<p.zabel@...gutronix.de>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Greg
Kroah-Hartman <gregkh@...uxfoundation.org>,
Arnd Bergmann <arnd@...db.de>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will@...nel.org>, <linux-spi@...r.kernel.org>,
<devicetree@...r.kernel.org>,
<linux-stm32@...md-mailman.stormreply.com>,
<linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
<christophe.kerello@...s.st.com>
Subject: Re: [PATCH v2 1/9] dt-bindings: spi: Add STM32 OSPI controller
On 1/29/25 08:40, Krzysztof Kozlowski wrote:
> On Tue, Jan 28, 2025 at 06:02:27PM +0000, Conor Dooley wrote:
>>> + st,syscfg-dlyb:
>>> + description: phandle to syscon block
>>> + Use to set the OSPI delay block within syscon to
>>> + tune the phase of the RX sampling clock (or DQS) in order
>>> + to sample the data in their valid window and to
>>> + tune the phase of the TX launch clock in order to meet setup
>>> + and hold constraints of TX signals versus the memory clock.
>>> + $ref: /schemas/types.yaml#/definitions/phandle-array
>>
>> Why do you need a phandle here? I assume looking up by compatible ain't
>> possible because you have multiple controllers on the SoC? Also, I don't
>> think your copy-paste "phandle to" stuff here is accurate:
>> st,syscfg-dlyb = <&syscfg 0x1000>;
>> There's an offset here that you don't mention in your description.
>
> This needs double items: and listing them with description, instead of
> free form text.
ok, i will remove most of ths text description and update as following :
st,syscfg-dlyb:
description: configure OCTOSPI delay block.
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
- description: phandle to syscfg
- description: register offset within syscfg
Thanks
Patrice
>
> Best regards,
> Krzysztof
>
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