linux-kernel - Re: [PATCH 2/9] dt-bindings: ata: Convert fsl,pq-sata binding to YAML

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Message-ID: <Z5zAp3X7U0oftneH@probook>
Date: Fri, 31 Jan 2025 12:23:03 +0000
From: J. Neuschäfer <j.ne@...teo.net>
To: Damien Le Moal <dlemoal@...nel.org>
Cc: j.ne@...teo.net, devicetree@...r.kernel.org,
	linuxppc-dev@...ts.ozlabs.org, Scott Wood <oss@...error.net>,
	Madhavan Srinivasan <maddy@...ux.ibm.com>,
	Michael Ellerman <mpe@...erman.id.au>,
	Nicholas Piggin <npiggin@...il.com>,
	Christophe Leroy <christophe.leroy@...roup.eu>,
	Naveen N Rao <naveen@...nel.org>, Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Niklas Cassel <cassel@...nel.org>,
	Herbert Xu <herbert@...dor.apana.org.au>,
	"David S. Miller" <davem@...emloft.net>, Lee Jones <lee@...nel.org>,
	Vinod Koul <vkoul@...nel.org>,
	Lorenzo Pieralisi <lpieralisi@...nel.org>,
	Krzysztof Wilczyński <kw@...ux.com>,
	Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
	Bjorn Helgaas <bhelgaas@...gle.com>,
	J. Neuschäfer <j.neuschaefer@....net>,
	Wim Van Sebroeck <wim@...ux-watchdog.org>,
	Guenter Roeck <linux@...ck-us.net>, Mark Brown <broonie@...nel.org>,
	Miquel Raynal <miquel.raynal@...tlin.com>,
	Richard Weinberger <richard@....at>,
	Vignesh Raghavendra <vigneshr@...com>, linux-kernel@...r.kernel.org,
	linux-ide@...r.kernel.org, linux-crypto@...r.kernel.org,
	dmaengine@...r.kernel.org, linux-pci@...r.kernel.org,
	linux-watchdog@...r.kernel.org, linux-spi@...r.kernel.org,
	linux-mtd@...ts.infradead.org
Subject: Re: [PATCH 2/9] dt-bindings: ata: Convert fsl,pq-sata binding to YAML

On Mon, Jan 27, 2025 at 08:22:55AM +0900, Damien Le Moal wrote:
> On 1/27/25 03:58, J. Neuschäfer via B4 Relay wrote:
> > From: "J. Neuschäfer" <j.ne@...teo.net>
> > 
> > Convert the Freescale PowerQUICC SATA controller binding from text form
> > to YAML. The list of compatible strings reflects current usage.
> > 
> > Signed-off-by: J. Neuschäfer <j.ne@...teo.net>
> > ---
> >  .../devicetree/bindings/ata/fsl,pq-sata.yaml       | 59 ++++++++++++++++++++++
[...]
> > +description: |
> > +  SATA nodes are defined to describe on-chip Serial ATA controllers.
> > +  Each SATA port should have its own node.
> 
> Very unclear. The SATA nodes define ports or controllers ? Normally, a single
> controller can have multiple ports, so the distinction is important.

I'll change it to "Each SATA controller ...", see below.


> > +  cell-index:
> > +    $ref: /schemas/types.yaml#/definitions/uint32
> > +    enum: [1, 2, 3, 4]
> > +    description: |
> > +      1 for controller @ 0x18000
> > +      2 for controller @ 0x19000
> > +      3 for controller @ 0x1a000
> > +      4 for controller @ 0x1b000
> 
> Are you sure these are different controllers ? Are they not different ports of
> the same controller ? Given that the previous text description define this as
> "controller index", I suspect these are the port offsets and you SATA nodes
> define ports, and not controllers.

They have no shared registers, and each instance has the same register
set (at a different base address).

The MPC8315E reference manual (for example) documents them as:

	SATA 1 Controller—Block Base Address 0x1_8000
	SATA 2 Controller—Block Base Address 0x1_9000

(table A.24 Serial ATA (SATA) Controller)

Section 15.2 Command Operation implies that each SATA controller
supports a single port:

	The SATA controller maintains a queue consisting of up to 16
	commands. These commands can be distributed to a single attached
	device or, if the system contains a port multiplier, over each
	of the attached devices.

So, in conclusion, I'm fairly sure "controller" is the right description.


Best regards,
J. Neuschäfer