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Message-ID: <20250131214611.3288742-7-jm@ti.com>
Date: Fri, 31 Jan 2025 15:46:08 -0600
From: Judith Mendez <jm@...com>
To: Nishanth Menon <nm@...com>, Vignesh Raghavendra <vigneshr@...com>
CC: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
<linux-arm-kernel@...ts.infradead.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, Andrew Davis
<afd@...com>,
Hari Nagalla <hnagalla@...com>, Judith Mendez <jm@...com>
Subject: [PATCH v2 6/9] arm64: dts: ti: k3-am62p5-sk: Enable ipc with remote processors
From: Devarsh Thakkar <devarsht@...com>
For each remote proc, reserve memory for IPC and bind the mailbox
assignments. Two memory regions are reserved for each remote processor.
The first region of 1MB of memory is used for Vring shared buffers
and the second region is used as external memory to the remote processor
for the resource table and for tracebuffer allocations.
Signed-off-by: Devarsh Thakkar <devarsht@...com>
Signed-off-by: Hari Nagalla <hnagalla@...com>
Signed-off-by: Judith Mendez <jm@...com>
---
Changes since v1:
- add patches 5-9 to enable ipc and complete device nodes
---
arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 50 ++++++++++++++++++++++---
1 file changed, 44 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
index ad71d2f27f538..63e3ce983453e 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
@@ -48,6 +48,30 @@ reserved-memory {
#size-cells = <2>;
ranges;
+ wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@...00000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0x9c800000 0x00 0x00100000>;
+ no-map;
+ };
+
+ wkup_r5fss0_core0_memory_region: r5f-memory@...00000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0x9c900000 0x00 0x01e00000>;
+ no-map;
+ };
+
+ mcu_r5fss0_core0_dma_memory_region: mcu-r5fss-dma-memory-region@...00000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0x9b800000 0x00 0x00100000>;
+ no-map;
+ };
+
+ mcu_r5fss0_core0_memory_region: mcu-r5fss-memory-region@...00000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0x9b900000 0x00 0x00f00000>;
+ no-map;
+ };
+
secure_tfa_ddr: tfa@...80000 {
reg = <0x00 0x9e780000 0x00 0x80000>;
no-map;
@@ -57,12 +81,6 @@ secure_ddr: optee@...00000 {
reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
no-map;
};
-
- wkup_r5fss0_core0_memory_region: r5f-dma-memory@...00000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0x9c900000 0x00 0x01e00000>;
- no-map;
- };
};
vmain_pd: regulator-0 {
@@ -638,6 +656,26 @@ mbox_mcu_r5_0: mbox-mcu-r5-0 {
};
};
+&wkup_r5fss0 {
+ status = "okay";
+};
+
+&wkup_r5fss0_core0 {
+ mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
+ memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
+ <&wkup_r5fss0_core0_memory_region>;
+};
+
+&mcu_r5fss0 {
+ status = "okay";
+};
+
+&mcu_r5fss0_core0 {
+ mboxes = <&mailbox0_cluster1 &mbox_mcu_r5_0>;
+ memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
+ <&mcu_r5fss0_core0_memory_region>;
+};
+
&main_uart0 {
pinctrl-names = "default";
pinctrl-0 = <&main_uart0_pins_default>;
--
2.48.0
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