lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <mvmbjvj2ft7.fsf@suse.de>
Date: Mon, 03 Feb 2025 16:44:52 +0100
From: Andreas Schwab <schwab@...e.de>
To: Björn Töpel <bjorn@...nel.org>
Cc: linux-riscv@...ts.infradead.org,  linux-kernel@...r.kernel.org
Subject: Re: [PATCH] riscv/futex: sign extend compare value in atomic cmpxchg

On Feb 03 2025, Björn Töpel wrote:

> Andreas Schwab <schwab@...e.de> writes:
>
>> Make sure the compare value in the lr/sc loop is sign extended to match
>> what lr.w does.  Fortunately, due to the compiler keeping the register
>> contents sign extended anyway the lack of the explicit extension didn't
>> result in wrong code so far, but this cannot be relied upon.
>>
>> Fixes: b90edb33010b ("RISC-V: Add futex support.")
>> Signed-off-by: Andreas Schwab <schwab@...e.de>
>
> Hmm, in this scenario we *can* rely on it, no (inline vs macro)?

No, the issue is that the asm operand (oldval) is u32, but the asm is
using the 64-bit value from the register.  You cannot expect that the
compiler keeps the upper half defined in any way at this point.  That is
different for the operand that is passed in from newval, because sc.w is
only using the low 32-bits from the operand.

-- 
Andreas Schwab, SUSE Labs, schwab@...e.de
GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE  1748 E4D4 88E3 0EEA B9D7
"And now for something completely different."

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ