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Message-ID: <85y0ym5e9e.fsf@amd.com>
Date: Tue, 4 Feb 2025 08:02:21 +0000
From: Nikunj A Dadhania <nikunj@....com>
To: Sean Christopherson <seanjc@...gle.com>, Thomas Gleixner
<tglx@...utronix.de>, Ingo Molnar <mingo@...hat.com>, Borislav Petkov
<bp@...en8.de>, Dave Hansen <dave.hansen@...ux.intel.com>, <x86@...nel.org>,
"Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>, Juergen Gross
<jgross@...e.com>, "K. Y. Srinivasan" <kys@...rosoft.com>, Haiyang Zhang
<haiyangz@...rosoft.com>, Wei Liu <wei.liu@...nel.org>, Dexuan Cui
<decui@...rosoft.com>, Ajay Kaher <ajay.kaher@...adcom.com>, "Alexey
Makhalov" <alexey.amakhalov@...adcom.com>, Jan Kiszka
<jan.kiszka@...mens.com>, Paolo Bonzini <pbonzini@...hat.com>, "Andy
Lutomirski" <luto@...nel.org>, Peter Zijlstra <peterz@...radead.org>
CC: <linux-kernel@...r.kernel.org>, <linux-coco@...ts.linux.dev>,
<virtualization@...ts.linux.dev>, <linux-hyperv@...r.kernel.org>,
<jailhouse-dev@...glegroups.com>, <kvm@...r.kernel.org>,
<xen-devel@...ts.xenproject.org>, Sean Christopherson <seanjc@...gle.com>,
Tom Lendacky <thomas.lendacky@....com>
Subject: Re: [PATCH 04/16] x86/sev: Mark TSC as reliable when configuring
Secure TSC
Sean Christopherson <seanjc@...gle.com> writes:
> Move the code to mark the TSC as reliable from sme_early_init() to
> snp_secure_tsc_init(). The only reader of TSC_RELIABLE is the aptly
> named check_system_tsc_reliable(), which runs in tsc_init(), i.e.
> after snp_secure_tsc_init().
>
> This will allow consolidating the handling of TSC_KNOWN_FREQ and
> TSC_RELIABLE when overriding the TSC calibration routine.
>
> Cc: Nikunj A Dadhania <nikunj@....com>
> Cc: Tom Lendacky <thomas.lendacky@....com>
> Signed-off-by: Sean Christopherson <seanjc@...gle.com>
Reviewed-by: Nikunj A Dadhania <nikunj@....com>
> ---
> arch/x86/coco/sev/core.c | 2 ++
> arch/x86/mm/mem_encrypt_amd.c | 3 ---
> 2 files changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/arch/x86/coco/sev/core.c b/arch/x86/coco/sev/core.c
> index 684cef70edc1..e6ce4ca72465 100644
> --- a/arch/x86/coco/sev/core.c
> +++ b/arch/x86/coco/sev/core.c
> @@ -3288,6 +3288,8 @@ void __init snp_secure_tsc_init(void)
> return;
>
> setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ);
> + setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE);
> +
> rdmsrl(MSR_AMD64_GUEST_TSC_FREQ, tsc_freq_mhz);
> snp_tsc_freq_khz = (unsigned long)(tsc_freq_mhz * 1000);
>
> diff --git a/arch/x86/mm/mem_encrypt_amd.c b/arch/x86/mm/mem_encrypt_amd.c
> index b56c5c073003..774f9677458f 100644
> --- a/arch/x86/mm/mem_encrypt_amd.c
> +++ b/arch/x86/mm/mem_encrypt_amd.c
> @@ -541,9 +541,6 @@ void __init sme_early_init(void)
> * kernel mapped.
> */
> snp_update_svsm_ca();
> -
> - if (sev_status & MSR_AMD64_SNP_SECURE_TSC)
> - setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE);
> }
>
> void __init mem_encrypt_free_decrypted_mem(void)
> --
> 2.48.1.362.g079036d154-goog
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