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Message-ID: <62589d83-f816-40f2-9eef-3f08fc9157ff@suse.com>
Date: Tue, 4 Feb 2025 10:58:35 +0100
From: Matthias Brugger <mbrugger@...e.com>
To: Larisa Grigore <larisa.grigore@....nxp.com>,
Chester Lin <chester62515@...il.com>,
Ghennadi Procopciuc <ghennadi.procopciuc@....nxp.com>,
Shawn Guo <shawnguo@...nel.org>, Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-kernel@...ts.infradead.org, imx@...ts.linux.dev,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, s32@....com,
clizzi@...hat.com, aruizrui@...hat.com, eballetb@...hat.com
Subject: Re: [PATCH v2 1/2] arm64: dts: s32g: add the eDMA nodes
On 03/02/2025 09:09, Larisa Grigore wrote:
> Add the two eDMA nodes in the device tree in order to enable the probing
> of the S32G2/S32G3 eDMA driver.
>
> Signed-off-by: Larisa Grigore <larisa.grigore@....nxp.com>
Reviewed-by: Matthias Brugger <mbrugger@...e.com>
> ---
>
> v2: Moved #dma-cells before dma-channels and clock-names after clocks.
>
> arch/arm64/boot/dts/freescale/s32g2.dtsi | 34 ++++++++++++++++++++++++
> arch/arm64/boot/dts/freescale/s32g3.dtsi | 34 ++++++++++++++++++++++++
> 2 files changed, 68 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi
> index 7be430b78c83..64eac1dde05b 100644
> --- a/arch/arm64/boot/dts/freescale/s32g2.dtsi
> +++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi
> @@ -317,6 +317,23 @@ usdhc0-200mhz-grp4 {
> };
> };
>
> + edma0: dma-controller@...44000 {
> + compatible = "nxp,s32g2-edma";
> + reg = <0x40144000 0x24000>,
> + <0x4012c000 0x3000>,
> + <0x40130000 0x3000>;
> + #dma-cells = <2>;
> + dma-channels = <32>;
> + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "tx-0-15",
> + "tx-16-31",
> + "err";
> + clocks = <&clks 63>, <&clks 64>;
> + clock-names = "dmamux0", "dmamux1";
> + };
> +
> uart0: serial@...c8000 {
> compatible = "nxp,s32g2-linflexuart",
> "fsl,s32v234-linflexuart";
> @@ -333,6 +350,23 @@ uart1: serial@...cc000 {
> status = "disabled";
> };
>
> + edma1: dma-controller@...44000 {
> + compatible = "nxp,s32g2-edma";
> + reg = <0x40244000 0x24000>,
> + <0x4022c000 0x3000>,
> + <0x40230000 0x3000>;
> + #dma-cells = <2>;
> + dma-channels = <32>;
> + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "tx-0-15",
> + "tx-16-31",
> + "err";
> + clocks = <&clks 63>, <&clks 64>;
> + clock-names = "dmamux0", "dmamux1";
> + };
> +
> uart2: serial@...bc000 {
> compatible = "nxp,s32g2-linflexuart",
> "fsl,s32v234-linflexuart";
> diff --git a/arch/arm64/boot/dts/freescale/s32g3.dtsi b/arch/arm64/boot/dts/freescale/s32g3.dtsi
> index 6c572ffe37ca..4f6201d6c08a 100644
> --- a/arch/arm64/boot/dts/freescale/s32g3.dtsi
> +++ b/arch/arm64/boot/dts/freescale/s32g3.dtsi
> @@ -374,6 +374,23 @@ usdhc0-200mhz-grp4 {
> };
> };
>
> + edma0: dma-controller@...44000 {
> + compatible = "nxp,s32g3-edma", "nxp,s32g2-edma";
> + reg = <0x40144000 0x24000>,
> + <0x4012c000 0x3000>,
> + <0x40130000 0x3000>;
> + #dma-cells = <2>;
> + dma-channels = <32>;
> + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "tx-0-15",
> + "tx-16-31",
> + "err";
> + clocks = <&clks 63>, <&clks 64>;
> + clock-names = "dmamux0", "dmamux1";
> + };
> +
> uart0: serial@...c8000 {
> compatible = "nxp,s32g3-linflexuart",
> "fsl,s32v234-linflexuart";
> @@ -390,6 +407,23 @@ uart1: serial@...cc000 {
> status = "disabled";
> };
>
> + edma1: dma-controller@...44000 {
> + compatible = "nxp,s32g3-edma", "nxp,s32g2-edma";
> + reg = <0x40244000 0x24000>,
> + <0x4022c000 0x3000>,
> + <0x40230000 0x3000>;
> + #dma-cells = <2>;
> + dma-channels = <32>;
> + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "tx-0-15",
> + "tx-16-31",
> + "err";
> + clocks = <&clks 63>, <&clks 64>;
> + clock-names = "dmamux0", "dmamux1";
> + };
> +
> uart2: serial@...bc000 {
> compatible = "nxp,s32g3-linflexuart",
> "fsl,s32v234-linflexuart";
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