linux-kernel - [PATCH v3 1/3] dt-bindings: fpga: stratix10: Convert to json-schema

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Message-Id: <20250204-socfpga_sip_svc_misc-v3-1-697f7f153cfa@intel.com>
Date: Tue, 04 Feb 2025 20:58:05 +0800
From: Mahesh Rao <mahesh.rao@...el.com>
To: Moritz Fischer <mdf@...nel.org>, Xu Yilun <yilun.xu@...el.com>, 
 Tom Rix <trix@...hat.com>, Rob Herring <robh@...nel.org>, 
 Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>, Dinh Nguyen <dinguyen@...nel.org>, 
 Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>, 
 Wu Hao <hao.wu@...el.com>, Ho Yin <adrian.ho.yin.ng@...era.com>, 
 Niravkumar L Rabara <nirav.rabara@...era.com>
Cc: linux-fpga@...r.kernel.org, devicetree@...r.kernel.org, 
 linux-kernel@...r.kernel.org, Mahesh Rao <mahesh.rao@...era.com>, 
 Mahesh Rao <mahesh.rao@...el.com>
Subject: [PATCH v3 1/3] dt-bindings: fpga: stratix10: Convert to
 json-schema

Convert intel,stratix10-soc fpga manager devicetree
binding file from freeform format to json-schema.

Reviewed-by: Rob Herring (Arm) <robh@...nel.org>
Signed-off-by: Mahesh Rao <mahesh.rao@...el.com>
---
 .../fpga/intel,stratix10-soc-fpga-mgr.yaml         | 36 ++++++++++++++++++++++
 .../bindings/fpga/intel-stratix10-soc-fpga-mgr.txt | 18 -----------
 2 files changed, 36 insertions(+), 18 deletions(-)

diff --git a/Documentation/devicetree/bindings/fpga/intel,stratix10-soc-fpga-mgr.yaml b/Documentation/devicetree/bindings/fpga/intel,stratix10-soc-fpga-mgr.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..6e536d6b28a9732c492da5d57f89df648dba7f4b
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/intel,stratix10-soc-fpga-mgr.yaml
@@ -0,0 +1,36 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/fpga/intel,stratix10-soc-fpga-mgr.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Intel Stratix10 SoC FPGA Manager
+
+maintainers:
+  - Mahesh Rao <mahesh.rao@...era.com>
+  - Adrian Ng Ho Yin <adrian.ho.yin.ng@...era.com>
+  - Niravkumar L Rabara <nirav.rabara@...era.com>
+
+description:
+  The Intel Stratix10 SoC consists of a 64-bit quad-core ARM Cortex A53 hard
+  processor system (HPS) and a Secure Device Manager (SDM). The Stratix10
+  SoC FPGA Manager driver is used to configure/reconfigure the FPGA fabric
+  on the die.The driver communicates with SDM/ATF via the stratix10-svc
+  platform driver for performing its operations.
+
+properties:
+  compatible:
+    enum:
+      - intel,stratix10-soc-fpga-mgr
+      - intel,agilex-soc-fpga-mgr
+
+required:
+  - compatible
+
+additionalProperties: false
+
+examples:
+  - |
+    fpga-mgr {
+      compatible = "intel,stratix10-soc-fpga-mgr";
+    };
diff --git a/Documentation/devicetree/bindings/fpga/intel-stratix10-soc-fpga-mgr.txt b/Documentation/devicetree/bindings/fpga/intel-stratix10-soc-fpga-mgr.txt
deleted file mode 100644
index 0f874137ca4697820341b23eddb882634bb131d1..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/fpga/intel-stratix10-soc-fpga-mgr.txt
+++ /dev/null
@@ -1,18 +0,0 @@
-Intel Stratix10 SoC FPGA Manager
-
-Required properties:
-The fpga_mgr node has the following mandatory property, must be located under
-firmware/svc node.
-
-- compatible : should contain "intel,stratix10-soc-fpga-mgr" or
-	       "intel,agilex-soc-fpga-mgr"
-
-Example:
-
-	firmware {
-		svc {
-			fpga_mgr: fpga-mgr {
-				compatible = "intel,stratix10-soc-fpga-mgr";
-			};
-		};
-	};

-- 
2.35.3