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Message-ID: <72837fcd-97a8-c213-0098-c8f308c3415d@gentwo.org>
Date: Wed, 5 Feb 2025 10:51:47 -0800 (PST)
From: "Christoph Lameter (Ampere)" <cl@...two.org>
To: Jessica Clarke <jrtc27@...c27.com>
cc: Maciej Wieczor-Retman <maciej.wieczor-retman@...el.com>, luto@...nel.org, 
    xin@...or.com, kirill.shutemov@...ux.intel.com, palmer@...belt.com, 
    tj@...nel.org, andreyknvl@...il.com, brgerst@...il.com, ardb@...nel.org, 
    dave.hansen@...ux.intel.com, jgross@...e.com, will@...nel.org, 
    akpm@...ux-foundation.org, arnd@...db.de, corbet@....net, 
    dvyukov@...gle.com, richard.weiyang@...il.com, ytcoode@...il.com, 
    tglx@...utronix.de, hpa@...or.com, seanjc@...gle.com, 
    paul.walmsley@...ive.com, aou@...s.berkeley.edu, justinstitt@...gle.com, 
    jason.andryuk@....com, glider@...gle.com, ubizjak@...il.com, 
    jannh@...gle.com, bhe@...hat.com, vincenzo.frascino@....com, 
    rafael.j.wysocki@...el.com, ndesaulniers@...gle.com, mingo@...hat.com, 
    catalin.marinas@....com, junichi.nomura@....com, nathan@...nel.org, 
    ryabinin.a.a@...il.com, dennis@...nel.org, bp@...en8.de, 
    kevinloughlin@...gle.com, morbo@...gle.com, dan.j.williams@...el.com, 
    julian.stecklina@...erus-technology.de, peterz@...radead.org, 
    kees@...nel.org, kasan-dev@...glegroups.com, x86@...nel.org, 
    linux-arm-kernel@...ts.infradead.org, linux-riscv@...ts.infradead.org, 
    linux-kernel@...r.kernel.org, linux-mm@...ck.org, llvm@...ts.linux.dev, 
    linux-doc@...r.kernel.org
Subject: Re: [PATCH 00/15] kasan: x86: arm64: risc-v: KASAN tag-based mode
 for x86

On Tue, 4 Feb 2025, Jessica Clarke wrote:

> It’s not “no performance penalty”, there is a cost to tracking the MTE
> tags for checking. In asynchronous (or asymmetric) mode that’s not too


On Ampere Processor hardware there is no penalty since the logic is build
into the usual read/write paths. This is by design. There may be on other
platforms that cannot do this.


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