linux-kernel - Re: [PATCH v5 11/24] perf vendor events: Update/add Graniterapids events/metrics

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <CAP-5=fWpbXSwZq5biRZ1fjcSJY2DO4g=cv-0K8jZ1Gzv3bOfhA@mail.gmail.com>
Date: Wed, 5 Feb 2025 13:33:48 -0800
From: Ian Rogers <irogers@...gle.com>
To: "Liang, Kan" <kan.liang@...ux.intel.com>
Cc: Peter Zijlstra <peterz@...radead.org>, Ingo Molnar <mingo@...hat.com>, 
	Arnaldo Carvalho de Melo <acme@...nel.org>, Namhyung Kim <namhyung@...nel.org>, 
	Mark Rutland <mark.rutland@....com>, 
	Alexander Shishkin <alexander.shishkin@...ux.intel.com>, Jiri Olsa <jolsa@...nel.org>, 
	Adrian Hunter <adrian.hunter@...el.com>, Andreas Färber <afaerber@...e.de>, 
	Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>, Weilin Wang <weilin.wang@...el.com>, 
	linux-kernel@...r.kernel.org, linux-perf-users@...r.kernel.org, 
	Perry Taylor <perry.taylor@...el.com>, Samantha Alt <samantha.alt@...el.com>, 
	Caleb Biggers <caleb.biggers@...el.com>, Edward Baker <edward.baker@...el.com>, 
	Michael Petlan <mpetlan@...hat.com>, Thomas Falcon <thomas.falcon@...el.com>
Subject: Re: [PATCH v5 11/24] perf vendor events: Update/add Graniterapids events/metrics

On Wed, Feb 5, 2025 at 1:10 PM Liang, Kan <kan.liang@...ux.intel.com> wrote:
>
> On 2025-02-05 3:23 p.m., Ian Rogers wrote:
> > On Wed, Feb 5, 2025 at 11:11 AM Liang, Kan <kan.liang@...ux.intel.com> wrote:
> >>
> >> On 2025-02-05 12:31 p.m., Ian Rogers wrote:
> >>> +    {
> >>> +        "BriefDescription": "This category represents fraction of slots utilized by useful work i.e. issued uops that eventually get retired",
> >>> +        "MetricExpr": "topdown\\-retiring / (topdown\\-fe\\-bound + topdown\\-bad\\-spec + topdown\\-retiring + topdown\\-be\\-bound) + 0 * slots",
> >>> +        "MetricGroup": "BvUW;TmaL1;TopdownL1;tma_L1_group",
> >>> +        "MetricName": "tma_retiring",
> >>> +        "MetricThreshold": "tma_retiring > 0.7 | tma_heavy_operations > 0.1",
> >>> +        "MetricgroupNoGroup": "TopdownL1",
> >>> +        "PublicDescription": "This category represents fraction of slots utilized by useful work i.e. issued uops that eventually get retired. Ideally; all pipeline slots would be attributed to the Retiring category.  Retiring of 100% would indicate the maximum Pipeline_Width throughput was achieved.  Maximizing Retiring typically increases the Instructions-per-cycle (see IPC metric). Note that a high Retiring value does not necessary mean there is no room for more performance.  For example; Heavy-operations or Microcode Assists are categorized under Retiring. They often indicate suboptimal performance and can often be optimized or avoided. Sample with: UOPS_RETIRED.SLOTS",
> >>> +        "ScaleUnit": "100%"
> >>> +    },
> >>
> >> The "Default" tag is missed for GNR as well.
> >> It seems the new CPUIDs are not added in the script?
> >
> > Spotted it, we need to manually say which architectures with TopdownL1
> > should be in Default because it was insisted upon that pre-Icelake
> > CPUs with TopdownL1 not have TopdownL1 in Default. As you know, my
> > preference would be to always put TopdownL1 metrics into Default.
> >
>
> For the future platforms, there should be always at least TopdownL1
> support. Intel even adds extra fixed counters for the TopdownL1 events.
>
> Maybe the script should be changed to only mark the old pre-Icelake as
> no TopdownL1 Default. For the other platforms, always add TopdownL1 as
> Default. It would avoid manually adding it for every new platforms.

That's fair. What about TopdownL2 that is currently only in the
Default set for SPR?

Thanks,
Ian