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Message-ID: <cb615ead-7dcf-430a-8265-60315c9a770b@kernel.org>
Date: Wed, 5 Feb 2025 08:32:17 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: matthew.gerlach@...ux.intel.com
Cc: lpieralisi@...nel.org, kw@...ux.com, manivannan.sadhasivam@...aro.org,
robh@...nel.org, bhelgaas@...gle.com, krzk+dt@...nel.org,
conor+dt@...nel.org, dinguyen@...nel.org, joyce.ooi@...el.com,
linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, matthew.gerlach@...era.com,
peter.colberg@...era.com
Subject: Re: [PATCH v5 4/5] arm64: dts: agilex: add dts enabling PCIe Root
Port
On 04/02/2025 17:57, matthew.gerlach@...ux.intel.com wrote:
>
>>
>>>>> +#include "socfpga_agilex_pcie_root_port.dtsi"
>>>>> +
>>>>
>>>> Missing board compatible, missing bindings.
>>>
>>> The model and compatible bindings are inherited from socfpga_agilex_socdk.dts.
>>
>> Then this is the same board, so entire DTS should be removed and instead
>> merged into parent DTS. There is no such thing as "inherit" of an
>> compatible.
>
> It is the same physical board, but the image programmed into the FPGA is
> different in so far as the PCIe IP is connected and enabled. This
> different FPGA image allows for a PCIe End Point to be plugged in. Is this
> difference enough for it be considered and different board?
Yes, it can be different board DTS. Look at other vendors how shared
designs are being actually shared between DTS - DTSI.
Best regards,
Krzysztof
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