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Message-ID: <ad7bc8809b8501e157a6e6da3a5b5863ca56c995.camel@surriel.com>
Date: Thu, 06 Feb 2025 09:48:25 -0500
From: Rik van Riel <riel@...riel.com>
To: Peter Zijlstra <peterz@...radead.org>
Cc: Oleksandr Natalenko <oleksandr@...alenko.name>, x86@...nel.org, 
	linux-kernel@...r.kernel.org, bp@...en8.de, dave.hansen@...ux.intel.com, 
	zhengqi.arch@...edance.com, nadav.amit@...il.com, thomas.lendacky@....com, 
	kernel-team@...a.com, linux-mm@...ck.org, akpm@...ux-foundation.org, 
	jannh@...gle.com, mhklinux@...look.com, andrew.cooper3@...rix.com
Subject: Re: [PATCH v9 00/12] AMD broadcast TLB invalidation

On Thu, 2025-02-06 at 15:23 +0100, Peter Zijlstra wrote:
> On Thu, Feb 06, 2025 at 09:16:35AM -0500, Rik van Riel wrote:
> 
> > This can result in flush_tlb_mm_range being called
> > with a stride_shift for 2MB pages, but a range ending
> > on a 4kB aligned (not 2MB aligned) boundary.
> > 
> > Peter, how should we solve this one?
> 
> I don't think that's wrong per-se, since all we really need is for
> end
> to be past the end, one byte, one page, or one stride don't matter
> much.
> 
> Anyway, I'm in desperate need of a break, so I'm not quite sure what
> the
> best way forward is.
> 
Given that the tlb_flush() code is used only for
page table freeing, we can just round up the
end address to the nearest stride boundary
there, with a comment explaining why?

Alternatively, we could just change the page
sizes used in pmd_free_tlb, pud_free_tlb,
and p4d_free_tlb, given that the functions
called now have parameters they didn't seem
to have back in 2014, when the linked email
in the comment was written?

Either way, no big hurry. The rounding up
is already being done in get_flush_tlb_info,
so all we have is a noisy WARN_ONCE :)

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