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Message-ID: <20250206202654.GA1000968@bhelgaas>
Date: Thu, 6 Feb 2025 14:26:54 -0600
From: Bjorn Helgaas <helgaas@...nel.org>
To: "Havalige, Thippeswamy" <thippeswamy.havalige@....com>
Cc: Markus Elfring <Markus.Elfring@....de>,
	"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	Bjorn Helgaas <bhelgaas@...gle.com>,
	Conor Dooley <conor+dt@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Krzysztof Wilczyński <kw@...ux.com>,
	Lorenzo Pieralisi <lpieralisi@...nel.org>,
	Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
	Rob Herring <robh@...nel.org>, LKML <linux-kernel@...r.kernel.org>,
	"Gogada, Bharat Kumar" <bharat.kumar.gogada@....com>,
	Jingoo Han <jingoohan1@...il.com>,
	"Simek, Michal" <michal.simek@....com>
Subject: Re: [PATCH v8 3/3] PCI: amd-mdb: Add AMD MDB Root Port driver

On Thu, Feb 06, 2025 at 04:07:23PM +0000, Havalige, Thippeswamy wrote:
> > -----Original Message-----
> > From: Markus Elfring <Markus.Elfring@....de>
> > Sent: Wednesday, February 5, 2025 8:40 PM
> > To: Havalige, Thippeswamy <thippeswamy.havalige@....com>; linux-
> > pci@...r.kernel.org; devicetree@...r.kernel.org; Bjorn Helgaas
> > <bhelgaas@...gle.com>; Conor Dooley <conor+dt@...nel.org>; Krzysztof
> > Kozlowski <krzk+dt@...nel.org>; Krzysztof Wilczyński <kw@...ux.com>;
> > Lorenzo Pieralisi <lpieralisi@...nel.org>; Manivannan Sadhasivam
> > <manivannan.sadhasivam@...aro.org>; Rob Herring <robh@...nel.org>
> > Cc: LKML <linux-kernel@...r.kernel.org>; Gogada, Bharat Kumar
> > <bharat.kumar.gogada@....com>; Jingoo Han <jingoohan1@...il.com>;
> > Simek, Michal <michal.simek@....com>
> > Subject: Re: [PATCH v8 3/3] PCI: amd-mdb: Add AMD MDB Root Port driver
> > 
> > …
> > > +++ b/drivers/pci/controller/dwc/pcie-amd-mdb.c
> > > @@ -0,0 +1,476 @@
> > …
> > > +static void amd_mdb_mask_intx_irq(struct irq_data *data)
> > > +{
> > …
> > > +	raw_spin_lock_irqsave(&port->lock, flags);
> > > +	val = pcie_read(pcie, AMD_MDB_TLP_IR_MASK_MISC);
> > > +	pcie_write(pcie, (val & (~mask)), AMD_MDB_TLP_IR_ENABLE_MISC);
> > > +	raw_spin_unlock_irqrestore(&port->lock, flags);
> > > +}
> > …
> > 
> > Under which circumstances would you become interested to apply a
> > statement like “guard(raw_spinlock_irqsave)(&port->lock);”?
> > https://elixir.bootlin.com/linux/v6.13.1/source/include/linux/spinlock.h#L551
>
> -Thanks for review comments, raw_spin_lock_irqsave is lightweight
> and performance oriented. 
>
> Achieves it by not performing few checks related to preemption, lock
> deprecation that was originally in spin_lock_irqsave.
>
> If you add guard around guard around the raw_spin_lock_irqsave then
> it should provide those additional safety checks.
>
> Its need is based on the environment, if you needs those
> checks/features.  We need to check the implementation/code to
> exactly see what are those. So choose to prevent my interrupt
> handler from being affected by latency pruning

IIUC, using guard() would not add any additional checks; it only helps
prevent errors like returning from the function without releasing the
lock.

That makes sense in larger functions with multiple exits, but IMO
there's no real benefit in a case like this where the function is so
short, there's only one exit, and it's completely obvious that we
lock, do something, and unlock.

I don't *really* like guard() anyway because it's kind of magic in
that the unlock doesn't actually appear in the code, and it's kind of
hard to unravel what guard() is and how it works.  But I guess that's
mostly because it's just a new idiom that takes time to internalize.

Bjorn

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