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Message-ID: <bacd6448-e327-41f9-aa5e-ef8a7522fd43@amd.com>
Date: Fri, 7 Feb 2025 12:35:25 -0600
From: "Bowman, Terry" <terry.bowman@....com>
To: Gregory Price <gourry@...rry.net>
Cc: linux-cxl@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-pci@...r.kernel.org, nifan.cxl@...il.com, dave@...olabs.net,
jonathan.cameron@...wei.com, dave.jiang@...el.com,
alison.schofield@...el.com, vishal.l.verma@...el.com,
dan.j.williams@...el.com, bhelgaas@...gle.com, mahesh@...ux.ibm.com,
ira.weiny@...el.com, oohall@...il.com, Benjamin.Cheatham@....com,
rrichter@....com, nathan.fontenot@....com,
Smita.KoralahalliChannabasappa@....com, lukas@...ner.de,
ming.li@...omail.com, PradeepVineshReddy.Kodamati@....com, alucerop@....com
Subject: Re: [PATCH v5 01/16] PCI/AER: Introduce 'struct cxl_err_handlers' and
add to 'struct pci_driver'
On 2/6/2025 11:01 AM, Gregory Price wrote:
> On Tue, Jan 07, 2025 at 08:38:37AM -0600, Terry Bowman wrote:
>> CXL.io provides protocol error handling on top of PCIe Protocol Error
>> handling. But, CXL.io and PCIe have different handling requirements
>> for uncorrectable errors (UCE).
>>
>> The PCIe AER service driver may attempt recovering PCIe devices with
>> UCE while recovery is not used for CXL.io. Recovery is not used in the
>> CXL.io case because of potential corruption on what can be system memory.
>>
>> Create pci_driver::cxl_err_handlers structure similar to
>> pci_driver::error_handler. Create handlers for correctable and
>> uncorrectable CXL.io error handling.
>>
>> The CXL error handlers will be used in future patches adding CXL PCIe
>> Port Protocol Error handling.
>>
>> Signed-off-by: Terry Bowman <terry.bowman@....com>
>> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@...wei.com>
>> Reviewed-by: Dave Jiang <dave.jiang@...el.com>
>> Reviewed-by: Fan Ni <fan.ni@...sung.com>
> Reviewed-by: Gregory Price <gourry@...rry.net>
Thanks for reviewing and adding the "Reviewed-by".
Terry
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