linux-kernel - RE: [PATCH v2 5/5] riscv: dts: starfive: jh7110-common: bootph-pre-ram hinting needed by boot loader

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Message-ID:
 <ZQ2PR01MB1307ECDF175D20547AC69287E6F1A@ZQ2PR01MB1307.CHNPR01.prod.partner.outlook.cn>
Date: Fri, 7 Feb 2025 03:01:13 +0000
From: Hal Feng <hal.feng@...rfivetech.com>
To: E Shattow <e@...eshell.de>, Hal Feng <hal.feng@...ux.starfivetech.com>,
	Heinrich Schuchardt <heinrich.schuchardt@...onical.com>
CC: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-riscv@...ts.infradead.org" <linux-riscv@...ts.infradead.org>, Emil
 Renner Berthing <kernel@...il.dk>, Conor Dooley <conor@...nel.org>, Rob
 Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Paul
 Walmsley <paul.walmsley@...ive.com>, Palmer Dabbelt <palmer@...belt.com>,
	Albert Ou <aou@...s.berkeley.edu>
Subject: RE: [PATCH v2 5/5] riscv: dts: starfive: jh7110-common:
 bootph-pre-ram hinting needed by boot loader

> On 06.02.25 19:17, E Shattow wrote:
> On 2/5/25 18:59, Hal Feng wrote:
> > On 2/5/2025 6:01 PM, Heinrich Schuchardt wrote:
> >> On 2/5/25 08:57, Hal Feng wrote:
> >>> On 2/3/2025 9:37 AM, E Shattow wrote:
> >>>> Add bootph-pre-ram hinting to jh7110-common.dtsi:
> >>>>    - i2c5_pins and i2c-pins subnode for connection to eeprom
> >>>>    - eeprom node
> >>>>    - qspi flash configuration subnode
> >>>>    - memory node
> >>>>    - uart0 for serial console
> >>>>
> >>>>    With this the U-Boot SPL secondary program loader may drop such
> >>>>    overrides when using dt-rebasing with JH7110 OF_UPSTREAM board
> targets.
> >>>>
> >>>> Signed-off-by: E Shattow <e@...eshell.de>
> >>>> ---
> >>>>   arch/riscv/boot/dts/starfive/jh7110-common.dtsi | 6 ++++++
> >>>>   1 file changed, 6 insertions(+)
> >>>>
> >>>> diff --git a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
> >>>> b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
> >>>> index 30c5f3487c8b..c9e7ae59ee7c 100644
> >>>> --- a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
> >>>> +++ b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
> >>>> @@ -28,6 +28,7 @@ chosen {
> >>>>       memory@...00000 {
> >>>>           device_type = "memory";
> >>>>           reg = <0x0 0x40000000 0x1 0x0>;
> >>>> +        bootph-pre-ram;
> >>>>       };
> >>>>         gpio-restart {
> >>>> @@ -247,6 +248,7 @@ emmc_vdd: aldo4 {
> >>>>       };
> >>>>         eeprom@50 {
> >>>> +        bootph-pre-ram;
> >>>>           compatible = "atmel,24c04";
> >>>>           reg = <0x50>;
> >>>>           pagesize = <16>;
> >>>> @@ -323,6 +325,7 @@ &qspi {
> >>>>       nor_flash: flash@0 {
> >>>>           compatible = "jedec,spi-nor";
> >>>>           reg = <0>;
> >>>> +        bootph-pre-ram;
> >>>>           cdns,read-delay = <2>;
> >>>>           spi-max-frequency = <100000000>;
> >>>>           cdns,tshsl-ns = <1>;
> >>>> @@ -405,6 +408,7 @@ GPOEN_SYS_I2C2_DATA,
> >>>>       };
> >>>>         i2c5_pins: i2c5-0 {
> >>>> +        bootph-pre-ram;
> >>>>           i2c-pins {
> >>>>               pinmux = <GPIOMUX(19, GPOUT_LOW,
> >>>>                             GPOEN_SYS_I2C5_CLK, @@ -413,6 +417,7 @@
> >>>> GPI_SYS_I2C5_CLK)>,
> >>>>                             GPOEN_SYS_I2C5_DATA,
> >>>>                             GPI_SYS_I2C5_DATA)>;
> >>>>               bias-disable; /* external pull-up */
> >>>> +            bootph-pre-ram;
> >>>>               input-enable;
> >>>>               input-schmitt-enable;
> >>>>           };
> >>>> @@ -641,6 +646,7 @@ GPOEN_DISABLE,
> >>>>   };
> >>>>     &uart0 {
> >>>> +    bootph-pre-ram;
> >>>>       clock-frequency = <24000000>;
> >>>>       pinctrl-names = "default";
> >>>>       pinctrl-0 = <&uart0_pins>;
> >>>
> >>> What about &mmc0, &mmc1, &qspi, &sysgpio, &mmc0_pins,
> &mmc1_pins, &i2c5?
> >>> Why not add "bootph-pre-ram;" for them?
> >>
> >> Would they be needed before relocation of U-Boot to DRAM?
> >
> > Yeah, they are needed by SPL and they are set in U-Boot
> > arch/riscv/dts/jh7110-common-u-boot.dtsi.
> >
> > Best regards,
> > Hal
> >
> 
> When I tested on Star64 there was none of those needed to boot. We can add
> more bootph-pre-ram as needed but I want to know how to test (because I
> did not see any need for these).
> 
> How do you test that these are needed?

In my opinion, SPL need to read U-Boot from EMMC (mmc0) or SDcard (mmc1) or
QSPI flash (qspi). Also it need to choose the correct DTB by reading EEPROM
mounted on i2c5. To run mmc / i2c drivers, the pin configurations (sysgpio, mmc0/1_pins)
are also needed.

Best regards,
Hal