linux-kernel - [PATCH v14 04/15] irqchip/gic-v3-its: Add support for device tree msi-map and msi-mask

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Message-Id: <20250207-ep-msi-v14-4-9671b136f2b8@nxp.com>
Date: Fri, 07 Feb 2025 14:39:46 -0500
From: Frank Li <Frank.Li@....com>
To: Kishon Vijay Abraham I <kishon@...nel.org>, 
 "Rafael J. Wysocki" <rafael@...nel.org>, 
 Thomas Gleixner <tglx@...utronix.de>, Anup Patel <apatel@...tanamicro.com>, 
 Kishon Vijay Abraham I <kishon@...nel.org>, Marc Zyngier <maz@...nel.org>, 
 Greg Kroah-Hartman <gregkh@...uxfoundation.org>, 
 "Rafael J. Wysocki" <rafael@...nel.org>, Danilo Krummrich <dakr@...nel.org>, 
 Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>, 
 Krzysztof Wilczyński <kw@...ux.com>, 
 Kishon Vijay Abraham I <kishon@...nel.org>, 
 Bjorn Helgaas <bhelgaas@...gle.com>, Arnd Bergmann <arnd@...db.de>, 
 Shuah Khan <shuah@...nel.org>, Richard Zhu <hongxing.zhu@....com>, 
 Lucas Stach <l.stach@...gutronix.de>, 
 Lorenzo Pieralisi <lpieralisi@...nel.org>, Rob Herring <robh@...nel.org>, 
 Shawn Guo <shawnguo@...nel.org>, Sascha Hauer <s.hauer@...gutronix.de>, 
 Pengutronix Kernel Team <kernel@...gutronix.de>, 
 Fabio Estevam <festevam@...il.com>, 
 Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>
Cc: Niklas Cassel <cassel@...nel.org>, dlemoal@...nel.org, jdmason@...zu.us, 
 linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, 
 linux-pci@...r.kernel.org, linux-kselftest@...r.kernel.org, 
 imx@...ts.linux.dev, devicetree@...r.kernel.org, 
 Frank Li <Frank.Li@....com>
Subject: [PATCH v14 04/15] irqchip/gic-v3-its: Add support for device tree
 msi-map and msi-mask

Some platform devices create child devices dynamically and require the
parent device's msi-map to map device IDs to actual sideband information.

A typical use case is using ITS as a PCIe Endpoint Controller(EPC)'s
doorbell function, where PCI hosts send TLP memory writes to the EP
controller. The EP controller converts these writes to AXI transactions
and appends platform-specific sideband information.  See below figure.

               ┌────────────────────────────────┐
               │                                │
               │     PCI Endpoint Controller    │
               │                                │
               │  ┌─────┐   ┌─────┐     ┌─────┐ │
    PCI Bus    │  │     │   │     │     │     │ │
    ─────────► │  │Func1│   │Func2│ ... │Func │ │
    TLP Memory │  │     │   │     │     │<n>  │ │
    Write Push │  │     │   │     │     │     │ │
    DoorBell   │  └─┬─┬─┘   └──┬──┘     └──┬──┘ │
               │    │ │        │           │    │
               └────┼─┼────────┼───────────┼────┘
        sideband    │ │ Address│           │
        information ▼ ▼ /Data  ▼           ▼
                   ┌────────────────────────┐
                   │    MSI Controller      │
                   └────────────────────────┘

EPC's DTS will provide such information by msi-map and msi-mask. A
simplified dts as

pcie-ep@...00000 {
	...
	msi-map = <0 &its 0xc 8>;
                          ^^^ 0xc is implement defined sideband information,
			      which append to AXI write transaction.
	           ^ 0 is function index.

	msi-mask = <0x7>
}

Check msi-map if msi-parent missed to keep compatility with existed system.

Signed-off-by: Frank Li <Frank.Li@....com>
---
 drivers/irqchip/irq-gic-v3-its-msi-parent.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/irqchip/irq-gic-v3-its-msi-parent.c b/drivers/irqchip/irq-gic-v3-its-msi-parent.c
index e150365fbe892..6c7389bb84a4a 100644
--- a/drivers/irqchip/irq-gic-v3-its-msi-parent.c
+++ b/drivers/irqchip/irq-gic-v3-its-msi-parent.c
@@ -118,6 +118,14 @@ static int of_pmsi_get_dev_id(struct irq_domain *domain, struct device *dev,
 		index++;
 	} while (!ret);

+	if (ret) {
+		struct device_node *np = NULL;
+
+		ret = of_map_id(dev->of_node, dev->id, "msi-map", "msi-map-mask", &np, dev_id);
+		if (np)
+			of_node_put(np);
+	}
+
 	return ret;
 }

-- 
2.34.1