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Message-ID: <1d4ce981-d91d-4dfd-b92b-7046494ef1cc@quicinc.com>
Date: Fri, 7 Feb 2025 14:59:14 -0800
From: Trilok Soni <quic_tsoni@...cinc.com>
To: Douglas Anderson <dianders@...omium.org>,
        Catalin Marinas
	<catalin.marinas@....com>,
        Will Deacon <will@...nel.org>, Mark Rutland
	<mark.rutland@....com>
CC: Jeffrey Hugo <quic_jhugo@...cinc.com>,
        Roxana Bradescu
	<roxabee@...gle.com>,
        <bjorn.andersson@....qualcomm.com>,
        Julius Werner
	<jwerner@...omium.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-arm-msm@...r.kernel.org>,
        Anshuman Khandual
	<anshuman.khandual@....com>,
        Besar Wicaksono <bwicaksono@...dia.com>,
        "D
 Scott Phillips" <scott@...amperecomputing.com>,
        Easwar Hariharan
	<eahariha@...ux.microsoft.com>,
        Oliver Upton <oliver.upton@...ux.dev>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3 2/2] arm64: cputype: Add comments about Qualcomm Kryo
 5XX and 6XX cores

On 12/19/2024 1:11 PM, Douglas Anderson wrote:
> As tested on one example of a Qualcomm Kryo 5XX CPU [1] and one
> example of a Qualcomm Kryo 6XX CPU [2], we don't need any extra MIDR
> definitions for the cores in those processors. Add comments to make it
> clear that these IDs weren't forgotten and just aren't needed.
> 
> [1] https://lore.kernel.org/r/l5rqbbxn6hktlcxooolkvi5n3arkht6zzhrvdjf6kis322nsup@5hsrak4cgteq/
> [2] https://lore.kernel.org/r/tx7vtur7yea6ruefrkpkccqptahgmxnsrudwdz5uzcfxnng25b@afrr5bmdk2xa/
> 
> 
> Suggested-by: Julius Werner <jwerner@...omium.org>
> Signed-off-by: Douglas Anderson <dianders@...omium.org>
> ---
> 
> Changes in v3:
> - New
> 
>  arch/arm64/include/asm/cputype.h | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
> index c8058f91a5bd..8782d4721f81 100644
> --- a/arch/arm64/include/asm/cputype.h
> +++ b/arch/arm64/include/asm/cputype.h
> @@ -200,6 +200,16 @@
>  #define MIDR_QCOM_KRYO_3XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_3XX_SILVER)
>  #define MIDR_QCOM_KRYO_4XX_GOLD MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_4XX_GOLD)
>  #define MIDR_QCOM_KRYO_4XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_4XX_SILVER)
> +
> +/*
> + * NOTES:
> + * - Qualcomm Kryo 5XX Prime / Gold ID themselves as MIDR_CORTEX_A77
> + * - Qualcomm Kryo 5XX Silver IDs itself as MIDR_QCOM_KRYO_4XX_SILVER
> + * - Qualcomm Kryo 6XX Prime IDs itself as MIDR_CORTEX_X1
> + * - Qualcomm Kryo 6XX Gold IDs itself as ARM_CPU_PART_CORTEX_A78
> + * - Qualcomm Kryo 6XX Silver IDs itself as MIDR_CORTEX_A55
> + */
> +
>  #define MIDR_NVIDIA_DENVER MIDR_CPU_MODEL(ARM_CPU_IMP_NVIDIA, NVIDIA_CPU_PART_DENVER)
>  #define MIDR_NVIDIA_CARMEL MIDR_CPU_MODEL(ARM_CPU_IMP_NVIDIA, NVIDIA_CPU_PART_CARMEL)
>  #define MIDR_FUJITSU_A64FX MIDR_CPU_MODEL(ARM_CPU_IMP_FUJITSU, FUJITSU_CPU_PART_A64FX)

Acked-by: Trilok Soni <quic_tsoni@...cinc.com>

-- 
---Trilok Soni

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