[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20250207083616.1442887-7-alexander.stein@ew.tq-group.com>
Date: Fri, 7 Feb 2025 09:36:11 +0100
From: Alexander Stein <alexander.stein@...tq-group.com>
To: Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
Cc: Alexander Stein <alexander.stein@...tq-group.com>,
devicetree@...r.kernel.org,
imx@...ts.linux.dev,
linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v2 06/10] arm64: dts: imx8mp: Add access-controller references
Mark ocotp as a access-controller and add references on peripherals
which can be disabled (fused).
Signed-off-by: Alexander Stein <alexander.stein@...tq-group.com>
---
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 26 +++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 66f7988271493..ee1cdfb660cf3 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -12,6 +12,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/thermal/thermal.h>
+#include "imx8mp-ocotp.h"
#include "imx8mp-pinfunc.h"
/ {
@@ -670,6 +671,7 @@ ocotp: efuse@...50000 {
/* For nvmem subnodes */
#address-cells = <1>;
#size-cells = <1>;
+ #access-controller-cells = <2>;
/*
* The register address below maps to the MX8M
@@ -1137,6 +1139,7 @@ flexcan1: can@...c0000 {
assigned-clock-rates = <40000000>;
fsl,clk-source = /bits/ 8 <0>;
fsl,stop-mode = <&gpr 0x10 4>;
+ access-controllers = <&ocotp IMX8MP_OCOTP_CAN_DISABLE>;
status = "disabled";
};
@@ -1152,6 +1155,7 @@ flexcan2: can@...d0000 {
assigned-clock-rates = <40000000>;
fsl,clk-source = /bits/ 8 <0>;
fsl,stop-mode = <&gpr 0x10 5>;
+ access-controllers = <&ocotp IMX8MP_OCOTP_CAN_DISABLE>;
status = "disabled";
};
};
@@ -1371,6 +1375,7 @@ fec: ethernet@...e0000 {
nvmem-cells = <ð_mac1>;
nvmem-cell-names = "mac-address";
fsl,stop-mode = <&gpr 0x10 3>;
+ access-controllers = <&ocotp IMX8MP_OCOTP_ENET1_DISABLE>;
status = "disabled";
};
@@ -1395,6 +1400,7 @@ eqos: ethernet@...f0000 {
nvmem-cells = <ð_mac2>;
nvmem-cell-names = "mac-address";
intf_mode = <&gpr 0x4>;
+ access-controllers = <&ocotp IMX8MP_OCOTP_ENET2_DISABLE>;
status = "disabled";
};
};
@@ -1526,6 +1532,7 @@ easrc: easrc@...90000 {
firmware-name = "imx/easrc/easrc-imx8mn.bin";
fsl,asrc-rate = <8000>;
fsl,asrc-format = <2>;
+ access-controllers = <&ocotp IMX8MP_OCOTP_ASRC_DISABLE>;
status = "disabled";
};
@@ -1582,6 +1589,7 @@ xcvr: xcvr@...c0000 {
dmas = <&sdma2 30 2 0>, <&sdma2 31 2 0>;
dma-names = "rx", "tx";
resets = <&audio_blk_ctrl 0>;
+
status = "disabled";
};
};
@@ -1701,6 +1709,7 @@ isp_0: isp@...10000 {
clock-names = "isp", "aclk", "hclk";
power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_ISP>;
fsl,blk-ctrl = <&media_blk_ctrl 0>;
+ access-controllers = <&ocotp IMX8MP_OCOTP_IMG_ISP1_DISABLE>;
status = "disabled";
ports {
@@ -1723,6 +1732,7 @@ isp_1: isp@...20000 {
clock-names = "isp", "aclk", "hclk";
power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_ISP>;
fsl,blk-ctrl = <&media_blk_ctrl 1>;
+ access-controllers = <&ocotp IMX8MP_OCOTP_IMG_ISP2_DISABLE>;
status = "disabled";
ports {
@@ -1743,6 +1753,7 @@ dewarp: dwe@...30000 {
<&clk IMX8MP_CLK_MEDIA_APB_ROOT>;
clock-names = "axi", "ahb";
power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_DWE>;
+ access-controllers = <&ocotp IMX8MP_OCOTP_IMG_DEWARP_DISABLE>;
};
mipi_csi_0: csi@...40000 {
@@ -1760,6 +1771,7 @@ mipi_csi_0: csi@...40000 {
assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_250M>,
<&clk IMX8MP_CLK_24M>;
power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_MIPI_CSI2_1>;
+ access-controllers = <&ocotp IMX8MP_OCOTP_MIPI_CSI1_DISABLE>;
status = "disabled";
ports {
@@ -1795,6 +1807,7 @@ mipi_csi_1: csi@...50000 {
assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_250M>,
<&clk IMX8MP_CLK_24M>;
power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_MIPI_CSI2_2>;
+ access-controllers = <&ocotp IMX8MP_OCOTP_MIPI_CSI2_DISABLE>;
status = "disabled";
ports {
@@ -1829,6 +1842,7 @@ mipi_dsi: dsi@...60000 {
samsung,pll-clock-frequency = <24000000>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_MIPI_DSI_1>;
+ access-controllers = <&ocotp IMX8MP_OCOTP_MIPI_DSI1_DISABLE>;
status = "disabled";
ports {
@@ -1976,6 +1990,7 @@ ldb_from_lcdif2: endpoint {
};
port@1 {
+ access-controllers = <&ocotp IMX8MP_OCOTP_LVDS1_DISABLE>;
reg = <1>;
ldb_lvds_ch0: endpoint {
@@ -1983,6 +1998,7 @@ ldb_lvds_ch0: endpoint {
};
port@2 {
+ access-controllers = <&ocotp IMX8MP_OCOTP_LVDS2_DISABLE>;
reg = <2>;
ldb_lvds_ch1: endpoint {
@@ -2198,6 +2214,7 @@ pcie: pcie@...00000 {
reset-names = "apps", "turnoff";
phys = <&pcie_phy>;
phy-names = "pcie-phy";
+ access-controllers = <&ocotp IMX8MP_OCOTP_PCIE1_DISABLE>;
status = "disabled";
};
@@ -2227,6 +2244,7 @@ pcie_ep: pcie-ep@...00000 {
phy-names = "pcie-phy";
num-ib-windows = <4>;
num-ob-windows = <4>;
+ access-controllers = <&ocotp IMX8MP_OCOTP_PCIE1_DISABLE>;
status = "disabled";
};
@@ -2245,6 +2263,7 @@ gpu3d: gpu@...00000 {
<&clk IMX8MP_SYS_PLL1_800M>;
assigned-clock-rates = <800000000>, <800000000>;
power-domains = <&pgc_gpu3d>;
+ access-controllers = <&ocotp IMX8MP_OCOTP_GPU3_DISABLE>;
};
gpu2d: gpu@...08000 {
@@ -2259,6 +2278,7 @@ gpu2d: gpu@...08000 {
assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>;
assigned-clock-rates = <800000000>;
power-domains = <&pgc_gpu2d>;
+ access-controllers = <&ocotp IMX8MP_OCOTP_GPU2_DISABLE>;
};
vpu_g1: video-codec@...00000 {
@@ -2270,6 +2290,7 @@ vpu_g1: video-codec@...00000 {
assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
assigned-clock-rates = <600000000>;
power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G1>;
+ access-controllers = <&ocotp IMX8MP_OCOTP_VPU_G1_DISABLE>;
};
vpu_g2: video-codec@...10000 {
@@ -2281,6 +2302,7 @@ vpu_g2: video-codec@...10000 {
assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>;
assigned-clock-rates = <500000000>;
power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G2>;
+ access-controllers = <&ocotp IMX8MP_OCOTP_VPU_G2_DISABLE>;
};
vpumix_blk_ctrl: blk-ctrl@...30000 {
@@ -2313,6 +2335,7 @@ npu: npu@...00000 {
<&clk IMX8MP_CLK_ML_AHB>;
clock-names = "core", "shader", "bus", "reg";
power-domains = <&pgc_mlmix>;
+ access-controllers = <&ocotp IMX8MP_OCOTP_NPU_DISABLE>;
};
gic: interrupt-controller@...00000 {
@@ -2362,6 +2385,7 @@ usb3_0: usb@...10100 {
#size-cells = <1>;
dma-ranges = <0x40000000 0x40000000 0xc0000000>;
ranges;
+ access-controllers = <&ocotp IMX8MP_OCOTP_USB1_DISABLE>;
status = "disabled";
usb_dwc3_0: usb@...00000 {
@@ -2405,6 +2429,7 @@ usb3_1: usb@...10108 {
#size-cells = <1>;
dma-ranges = <0x40000000 0x40000000 0xc0000000>;
ranges;
+ access-controllers = <&ocotp IMX8MP_OCOTP_USB2_DISABLE>;
status = "disabled";
usb_dwc3_1: usb@...00000 {
@@ -2430,6 +2455,7 @@ dsp: dsp@...e8000 {
mboxes = <&mu2 2 0>, <&mu2 2 1>,
<&mu2 3 0>, <&mu2 3 1>;
memory-region = <&dsp_reserved>;
+ access-controllers = <&ocotp IMX8MP_OCOTP_AUDIO_PROCESSOR_DISABLE>;
status = "disabled";
};
};
--
2.34.1
Powered by blists - more mailing lists