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Message-ID: <2568692.iZASKD2KPV@steina-w>
Date: Fri, 07 Feb 2025 10:03:23 +0100
From: Alexander Stein <alexander.stein@...tq-group.com>
To: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, Shawn Guo <shawnguo@...nel.org>, Sascha Hauer <s.hauer@...gutronix.de>, Pengutronix Kernel Team <kernel@...gutronix.de>, Fabio Estevam <festevam@...il.com>, Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
Cc: devicetree@...r.kernel.org, imx@...ts.linux.dev, linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 10/10] arm64: dts: imx8mq: Add access-controller references
Am Freitag, 7. Februar 2025, 09:36:15 CET schrieb Alexander Stein:
> Mark ocotp as a access-controller and add references on peripherals
> which can be disabled (fused).
>
> Signed-off-by: Alexander Stein <alexander.stein@...tq-group.com>
> ---
> arch/arm64/boot/dts/freescale/imx8mq.dtsi | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> index df8ba1d5391ae..95a40cccd46b9 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
I just noticed, I missed #access-controller-cells = <2>; for ocotp node.
Will add in next version.
Best regards,
Alexander
> @@ -12,6 +12,7 @@
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/thermal/thermal.h>
> #include <dt-bindings/interconnect/imx8mq.h>
> +#include "imx8mq-ocotp.h"
> #include "imx8mq-pinfunc.h"
>
> / {
> @@ -1275,6 +1276,7 @@ mipi_dsi: dsi@...00000 {
> <&src IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N>,
> <&src IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N>;
> reset-names = "byte", "dpi", "esc", "pclk";
> + access-controllers = <&ocotp IMX8MQ_OCOTP_MIPI_DSI_DISABLE>;
> status = "disabled";
>
> ports {
> @@ -1392,6 +1394,7 @@ mipi_csi1: csi@...70000 {
> fsl,mipi-phy-gpr = <&iomuxc_gpr 0x88>;
> interconnects = <&noc IMX8MQ_ICM_CSI1 &noc IMX8MQ_ICS_DRAM>;
> interconnect-names = "dram";
> + access-controllers = <&ocotp IMX8MQ_OCOTP_MIPI_CSI1_DISABLE>;
> status = "disabled";
>
> ports {
> @@ -1414,6 +1417,7 @@ csi1: csi@...90000 {
> interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&clk IMX8MQ_CLK_CSI1_ROOT>;
> clock-names = "mclk";
> + access-controllers = <&ocotp IMX8MQ_OCOTP_MIPI_CSI1_DISABLE>;
> status = "disabled";
>
> port {
> @@ -1444,6 +1448,7 @@ mipi_csi2: csi@...60000 {
> fsl,mipi-phy-gpr = <&iomuxc_gpr 0xa4>;
> interconnects = <&noc IMX8MQ_ICM_CSI2 &noc IMX8MQ_ICS_DRAM>;
> interconnect-names = "dram";
> + access-controllers = <&ocotp IMX8MQ_OCOTP_MIPI_CSI2_DISABLE>;
> status = "disabled";
>
> ports {
> @@ -1466,6 +1471,7 @@ csi2: csi@...80000 {
> interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&clk IMX8MQ_CLK_CSI2_ROOT>;
> clock-names = "mclk";
> + access-controllers = <&ocotp IMX8MQ_OCOTP_MIPI_CSI2_DISABLE>;
> status = "disabled";
>
> port {
> @@ -1566,6 +1572,7 @@ fec1: ethernet@...e0000 {
> nvmem-cells = <&fec_mac_address>;
> nvmem-cell-names = "mac-address";
> fsl,stop-mode = <&iomuxc_gpr 0x10 3>;
> + access-controllers = <&ocotp IMX8MQ_OCOTP_ENET_DISABLE>;
> status = "disabled";
> };
> };
> @@ -1705,6 +1712,7 @@ gpu: gpu@...00000 {
> <&clk IMX8MQ_GPU_PLL>;
> assigned-clock-rates = <800000000>, <800000000>,
> <800000000>, <800000000>, <0>;
> + access-controllers = <&ocotp IMX8MQ_OCOTP_GPU_DISABLE>;
> power-domains = <&pgc_gpu>;
> };
>
> @@ -1725,6 +1733,7 @@ usb_dwc3_0: usb@...00000 {
> phy-names = "usb2-phy", "usb3-phy";
> power-domains = <&pgc_otg1>;
> snps,parkmode-disable-ss-quirk;
> + access-controllers = <&ocotp IMX8MQ_OCOTP_USB_OTG1_DISABLE>;
> status = "disabled";
> };
>
> @@ -1757,6 +1766,7 @@ usb_dwc3_1: usb@...00000 {
> phy-names = "usb2-phy", "usb3-phy";
> power-domains = <&pgc_otg2>;
> snps,parkmode-disable-ss-quirk;
> + access-controllers = <&ocotp IMX8MQ_OCOTP_USB_OTG2_DISABLE>;
> status = "disabled";
> };
>
> @@ -1778,6 +1788,7 @@ vpu_g1: video-codec@...00000 {
> interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>;
> power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G1>;
> + access-controllers = <&ocotp IMX8MQ_OCOTP_VPU_DISABLE>;
> };
>
> vpu_g2: video-codec@...10000 {
> @@ -1786,6 +1797,7 @@ vpu_g2: video-codec@...10000 {
> interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&clk IMX8MQ_CLK_VPU_G2_ROOT>;
> power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G2>;
> + access-controllers = <&ocotp IMX8MQ_OCOTP_VPU_DISABLE>;
> };
>
> vpu_blk_ctrl: blk-ctrl@...20000 {
> @@ -1839,6 +1851,7 @@ pcie0: pcie@...00000 {
> <&clk IMX8MQ_SYS1_PLL_80M>;
> assigned-clock-rates = <250000000>, <100000000>,
> <10000000>;
> + access-controllers = <&ocotp IMX8MQ_OCOTP_PCIE1_DISABLE>;
> status = "disabled";
> };
>
> @@ -1882,6 +1895,7 @@ pcie1: pcie@...00000 {
> <&clk IMX8MQ_SYS1_PLL_80M>;
> assigned-clock-rates = <250000000>, <100000000>,
> <10000000>;
> + access-controllers = <&ocotp IMX8MQ_OCOTP_PCIE2_DISABLE>;
> status = "disabled";
> };
>
> @@ -1916,6 +1930,7 @@ pcie1_ep: pcie-ep@...00000 {
> <10000000>;
> num-ib-windows = <4>;
> num-ob-windows = <4>;
> + access-controllers = <&ocotp IMX8MQ_OCOTP_PCIE2_DISABLE>;
> status = "disabled";
> };
>
>
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