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Message-ID: <20250207014437.17920-3-crystal.guo@mediatek.com>
Date: Fri, 7 Feb 2025 09:42:48 +0800
From: Crystal Guo <crystal.guo@...iatek.com>
To: Krzysztof Kozlowski <krzk@...nel.org>, Rob Herring <robh@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Matthias Brugger
<matthias.bgg@...il.com>, AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>, Crystal Guo
<crystal.guo@...iatek.com>
CC: <linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>, <linux-mediatek@...ts.infradead.org>,
<Project_Global_Chrome_Upstream_Group@...iatek.com>
Subject: [v2,2/2] dt-bindings: memory-controllers: Add MediaTek DRAM controller interface
A MediaTek DRAM controller interface to provide the current DDR data rate.
Signed-off-by: Crystal Guo <crystal.guo@...iatek.com>
---
.../memory-controllers/mediatek,dramc.yaml | 44 +++++++++++++++++++
1 file changed, 44 insertions(+)
create mode 100644 Documentation/devicetree/bindings/memory-controllers/mediatek,dramc.yaml
diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,dramc.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,dramc.yaml
new file mode 100644
index 000000000000..8bdacfc36cb5
--- /dev/null
+++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,dramc.yaml
@@ -0,0 +1,44 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (c) 2025 MediaTek Inc.
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/memory-controllers/mediatek,dramc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek DRAM Controller (DRAMC)
+
+maintainers:
+ - Crystal Guo <crystal.guo@...iatek.com>
+
+description:
+ A MediaTek DRAM controller interface to provide the current data rate of DRAM.
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - mediatek,mt8196-dramc
+
+ reg:
+ items:
+ - description: anaphy registers
+ - description: ddrphy registers
+
+additionalProperties: false
+
+required:
+ - compatible
+ - reg
+
+examples:
+ - |
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ memory-controller@...36000 {
+ compatible = "mediatek,mt8196-dramc";
+ reg = <0 0x10236000 0 0x2000>,
+ <0 0x10238000 0 0x2000>;
+ };
+ };
--
2.18.0
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