lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <CAK9=C2XmFtLHAxuWJVdvkUHFQTM+mE-D8E4sLvKxxUj_CqcbAQ@mail.gmail.com>
Date: Sat, 8 Feb 2025 13:29:42 +0530
From: Anup Patel <apatel@...tanamicro.com>
To: Andrew Jones <ajones@...tanamicro.com>
Cc: linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org, 
	paul.walmsley@...ive.com, palmer@...belt.com, charlie@...osinc.com, 
	jesse@...osinc.com
Subject: Re: [PATCH 0/9] riscv: Unaligned access speed probing fixes and skipping

On Fri, Feb 7, 2025 at 9:49 PM Andrew Jones <ajones@...tanamicro.com> wrote:
>
> The first six patches of this series are fixes and cleanups of the
> unaligned access speed probing code. The next two patches introduce
> support to skip probing by matching vendor/arch/imp ids and checking a
> table for the access speed type. The last patch applies the new skip
> support to Ventana harts.

Alternatively, we can also skip probing misaligned access when Zicclsm
extension is present in the ISA string. The Zicclsm extension is defined
as part of the ratified RVA23 profile.

Regards,
Anup

>
> (I'd be happy to split the fixes from the new skip support if we want to
> discuss the skip support independently, but I want to base on the fixes
> and I'm not sure if patchwork supports Based-on: $MESSAGE_ID/$LORE_URL
> or not at the moment, so I'm just posting together for now in order to
> be able to check for my patchwork green lights!)
>
> Thanks,
> drew
>
> Andrew Jones (9):
>   riscv: Annotate unaligned access init functions
>   riscv: Fix riscv_online_cpu_vec
>   riscv: Fix check_unaligned_access_all_cpus
>   riscv: Change check_unaligned_access_speed_all_cpus to void
>   riscv: Fix set up of cpu hotplug callbacks
>   riscv: Fix set up of vector cpu hotplug callback
>   riscv: Prepare for unaligned access type table lookups
>   riscv: Implement check_unaligned_access_table
>   riscv: Add Ventana unaligned access table entries
>
>  arch/riscv/include/asm/cpufeature.h        |   4 +-
>  arch/riscv/include/asm/vendorid_list.h     |   1 +
>  arch/riscv/kernel/traps_misaligned.c       |  14 +-
>  arch/riscv/kernel/unaligned_access_speed.c | 278 ++++++++++++++-------
>  4 files changed, 200 insertions(+), 97 deletions(-)
>
> --
> 2.48.1
>

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ