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Message-ID: <81563943-f5cc-4489-bfaa-d58ad3816516@gmail.com>
Date: Sat, 8 Feb 2025 11:07:11 +0100
From: Robert Marko <robimarko@...il.com>
To: Christian Marangi <ansuelsmth@...il.com>,
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
Miquel Raynal <miquel.raynal@...tlin.com>,
Richard Weinberger <richard@....at>, Vignesh Raghavendra <vigneshr@...com>,
Konrad Dybcio <konrad.dybcio@....qualcomm.com>,
Md Sadre Alam <quic_mdalam@...cinc.com>, linux-mtd@...ts.infradead.org,
linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org
Cc: stable@...r.kernel.org
Subject: Re: [PATCH] mtd: rawnand: qcom: fix broken config in
qcom_param_page_type_exec
On 07. 02. 2025. 20:54, Christian Marangi wrote:
> Fix broken config in qcom_param_page_type_exec caused by copy-paste error
> from commit 0c08080fd71c ("mtd: rawnand: qcom: use FIELD_PREP and GENMASK")
>
> In qcom_param_page_type_exec the value needs to be set to
> nandc->regs->cfg0 instead of host->cfg0. This wrong configuration caused
> the Qcom NANDC driver to malfunction on any device that makes use of it
> (IPQ806x, IPQ40xx, IPQ807x, IPQ60xx) with the following error:
>
> [ 0.885369] nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xaa
> [ 0.885909] nand: Micron NAND 256MiB 1,8V 8-bit
> [ 0.892499] nand: 256 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64
> [ 0.896823] nand: ECC (step, strength) = (512, 8) does not fit in OOB
> [ 0.896836] qcom-nandc 79b0000.nand-controller: No valid ECC settings possible
> [ 0.910996] bam-dma-engine 7984000.dma-controller: Cannot free busy channel
> [ 0.918070] qcom-nandc: probe of 79b0000.nand-controller failed with error -28
>
> Restore original configuration fix the problem and makes the driver work
> again.
>
> Cc: stable@...r.kernel.org
> Fixes: 0c08080fd71c ("mtd: rawnand: qcom: use FIELD_PREP and GENMASK")
> Signed-off-by: Christian Marangi <ansuelsmth@...il.com>
Tested-by: Robert Marko <robimarko@...il.com> #IPQ8074 and IPQ6018
> ---
> drivers/mtd/nand/raw/qcom_nandc.c | 24 ++++++++++++------------
> 1 file changed, 12 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
> index d2d2aeee42a7..4e3a3e049d9d 100644
> --- a/drivers/mtd/nand/raw/qcom_nandc.c
> +++ b/drivers/mtd/nand/raw/qcom_nandc.c
> @@ -1881,18 +1881,18 @@ static int qcom_param_page_type_exec(struct nand_chip *chip, const struct nand_
> nandc->regs->addr0 = 0;
> nandc->regs->addr1 = 0;
>
> - host->cfg0 = FIELD_PREP(CW_PER_PAGE_MASK, 0) |
> - FIELD_PREP(UD_SIZE_BYTES_MASK, 512) |
> - FIELD_PREP(NUM_ADDR_CYCLES_MASK, 5) |
> - FIELD_PREP(SPARE_SIZE_BYTES_MASK, 0);
> -
> - host->cfg1 = FIELD_PREP(NAND_RECOVERY_CYCLES_MASK, 7) |
> - FIELD_PREP(BAD_BLOCK_BYTE_NUM_MASK, 17) |
> - FIELD_PREP(CS_ACTIVE_BSY, 0) |
> - FIELD_PREP(BAD_BLOCK_IN_SPARE_AREA, 1) |
> - FIELD_PREP(WR_RD_BSY_GAP_MASK, 2) |
> - FIELD_PREP(WIDE_FLASH, 0) |
> - FIELD_PREP(DEV0_CFG1_ECC_DISABLE, 1);
> + nandc->regs->cfg0 = FIELD_PREP(CW_PER_PAGE_MASK, 0) |
> + FIELD_PREP(UD_SIZE_BYTES_MASK, 512) |
> + FIELD_PREP(NUM_ADDR_CYCLES_MASK, 5) |
> + FIELD_PREP(SPARE_SIZE_BYTES_MASK, 0);
> +
> + nandc->regs->cfg1 = FIELD_PREP(NAND_RECOVERY_CYCLES_MASK, 7) |
> + FIELD_PREP(BAD_BLOCK_BYTE_NUM_MASK, 17) |
> + FIELD_PREP(CS_ACTIVE_BSY, 0) |
> + FIELD_PREP(BAD_BLOCK_IN_SPARE_AREA, 1) |
> + FIELD_PREP(WR_RD_BSY_GAP_MASK, 2) |
> + FIELD_PREP(WIDE_FLASH, 0) |
> + FIELD_PREP(DEV0_CFG1_ECC_DISABLE, 1);
>
> if (!nandc->props->qpic_version2)
> nandc->regs->ecc_buf_cfg = cpu_to_le32(ECC_CFG_ECC_DISABLE);
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