linux-kernel - Re: [PATCH v3 RESEND] arm64: dts: qcom: qcs8300: Add QUPv3 configuration

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Message-ID: <1267c7ea-f06e-4165-8845-00685482a2bc@kernel.org>
Date: Mon, 10 Feb 2025 16:22:49 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Viken Dadhaniya <quic_vdadhani@...cinc.com>, andersson@...nel.org,
 konradybcio@...nel.org, robh@...nel.org, krzk+dt@...nel.org,
 conor+dt@...nel.org, linux-arm-msm@...r.kernel.org,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Cc: quic_msavaliy@...cinc.com, quic_anupkulk@...cinc.com
Subject: Re: [PATCH v3 RESEND] arm64: dts: qcom: qcs8300: Add QUPv3
 configuration

On 10/02/2025 09:46, Viken Dadhaniya wrote:
> Add DT support for QUPV3 Serial Engines.
> 
> Co-developed-by: Mukesh Kumar Savaliya <quic_msavaliy@...cinc.com>
> Signed-off-by: Mukesh Kumar Savaliya <quic_msavaliy@...cinc.com>
> Signed-off-by: Viken Dadhaniya <quic_vdadhani@...cinc.com>
> ---
> 
> v2 -> v3:
> 
> - Remove build dependencies list.
> - Rebase the patch.
> 
> v2 Link: https://lore.kernel.org/linux-kernel/20241112172337.3120801-1-quic_vdadhani@quicinc.com/
> 
> v1 -> v2:
> 
> - Correct gpi dma node name and compatible strings
> - Use QCOM_ICC_TAG_ALWAYS flag in interconnect property.
> - Update build dependency list.
> 
> v1 Link: https://lore.kernel.org/linux-devicetree/20241009091150.32354-1-quic_vdadhani@quicinc.com/
> ---
> ---
>  arch/arm64/boot/dts/qcom/qcs8300.dtsi | 1916 ++++++++++++++++++++++++-
>  1 file changed, 1908 insertions(+), 8 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
> index 4a057f7c0d9f..9239cd122c13 100644
> --- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi
> +++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
> @@ -9,6 +9,7 @@
>  #include <dt-bindings/clock/qcom,sa8775p-dispcc.h>
>  #include <dt-bindings/clock/qcom,sa8775p-gpucc.h>
>  #include <dt-bindings/clock/qcom,sa8775p-videocc.h>
> +#include <dt-bindings/dma/qcom-gpi.h>
>  #include <dt-bindings/firmware/qcom,scm.h>
>  #include <dt-bindings/interconnect/qcom,icc.h>
>  #include <dt-bindings/interconnect/qcom,qcs8300-rpmh.h>
> @@ -23,6 +24,39 @@ / {
>  	#address-cells = <2>;
>  	#size-cells = <2>;
>  
> +	aliases {
> +		i2c0 = &i2c0;
> +		i2c1 = &i2c1;
> +		i2c2 = &i2c2;
> +		i2c3 = &i2c3;
> +		i2c4 = &i2c4;
> +		i2c5 = &i2c5;
> +		i2c6 = &i2c6;
> +		i2c8 = &i2c8;
> +		i2c9 = &i2c9;
> +		i2c10 = &i2c10;
> +		i2c11 = &i2c11;
> +		i2c12 = &i2c12;
> +		i2c13 = &i2c13;
> +		i2c14 = &i2c14;
> +		i2c15 = &i2c15;
> +		spi0 = &spi0;
> +		spi1 = &spi1;
> +		spi2 = &spi2;
> +		spi3 = &spi3;
> +		spi4 = &spi4;
> +		spi5 = &spi5;
> +		spi6 = &spi6;
> +		spi8 = &spi8;
> +		spi9 = &spi9;
> +		spi10 = &spi10;
> +		spi12 = &spi12;
> +		spi13 = &spi13;
> +		spi14 = &spi14;
> +		spi15 = &spi15;
> +		serial0 = &uart7;

NAK, this does not belong to the SoC, but board.

> +	};
Best regards,
Krzysztof