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Message-Id: <20250210160012.783446-2-alexander.stein@ew.tq-group.com>
Date: Mon, 10 Feb 2025 17:00:10 +0100
From: Alexander Stein <alexander.stein@...tq-group.com>
To: Abel Vesa <abelvesa@...nel.org>,
Peng Fan <peng.fan@....com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>
Cc: Alexander Stein <alexander.stein@...tq-group.com>,
linux-clk@...r.kernel.org,
imx@...ts.linux.dev,
linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: [RFC PATCH 2/3] clk: imx: clk-fracn-gppll: Refactor clk_fracn_gppll_calc_rate
Move the frequency calculation into its dedicated function for multiple
usage. No functional change.
Signed-off-by: Alexander Stein <alexander.stein@...tq-group.com>
---
drivers/clk/imx/clk-fracn-gppll.c | 54 ++++++++++++++++++-------------
1 file changed, 31 insertions(+), 23 deletions(-)
diff --git a/drivers/clk/imx/clk-fracn-gppll.c b/drivers/clk/imx/clk-fracn-gppll.c
index 3aef548110e25..a7d57fbe93196 100644
--- a/drivers/clk/imx/clk-fracn-gppll.c
+++ b/drivers/clk/imx/clk-fracn-gppll.c
@@ -150,35 +150,15 @@ static long clk_fracn_gppll_round_rate(struct clk_hw *hw, unsigned long rate,
return rate_table[pll->rate_count - 1].rate;
}
-static unsigned long clk_fracn_gppll_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
+static long clk_fracn_gppll_calc_rate(struct clk_fracn_gppll *pll, u32 mfn,
+ u32 mfd, u32 mfi, u32 rdiv, u32 odiv,
+ unsigned long parent_rate)
{
- struct clk_fracn_gppll *pll = to_clk_fracn_gppll(hw);
const struct imx_fracn_gppll_rate_table *rate_table = pll->rate_table;
- u32 pll_div;
- u32 mfi, mfn, mfd, rdiv, odiv;
u64 fvco = parent_rate;
long rate = 0;
int i;
- if (pll->flags & CLK_FRACN_GPPLL_FRACN) {
- u32 pll_numerator, pll_denominator;
-
- pll_numerator = readl_relaxed(pll->base + PLL_NUMERATOR);
- mfn = FIELD_GET(PLL_MFN_MASK, pll_numerator);
-
- pll_denominator = readl_relaxed(pll->base + PLL_DENOMINATOR);
- mfd = FIELD_GET(PLL_MFD_MASK, pll_denominator);
- } else {
- mfd = 0;
- mfn = 0;
- }
-
- pll_div = readl_relaxed(pll->base + PLL_DIV);
- mfi = FIELD_GET(PLL_MFI_MASK, pll_div);
-
- rdiv = FIELD_GET(PLL_RDIV_MASK, pll_div);
- odiv = FIELD_GET(PLL_ODIV_MASK, pll_div);
-
/*
* Sometimes, the recalculated rate has deviation due to
* the frac part. So find the accurate pll rate from the table
@@ -222,6 +202,34 @@ static unsigned long clk_fracn_gppll_recalc_rate(struct clk_hw *hw, unsigned lon
return (unsigned long)fvco;
}
+static unsigned long clk_fracn_gppll_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
+{
+ struct clk_fracn_gppll *pll = to_clk_fracn_gppll(hw);
+ u32 pll_div;
+ u32 mfi, mfn, mfd, rdiv, odiv;
+
+ if (pll->flags & CLK_FRACN_GPPLL_FRACN) {
+ u32 pll_numerator, pll_denominator;
+
+ pll_numerator = readl_relaxed(pll->base + PLL_NUMERATOR);
+ mfn = FIELD_GET(PLL_MFN_MASK, pll_numerator);
+
+ pll_denominator = readl_relaxed(pll->base + PLL_DENOMINATOR);
+ mfd = FIELD_GET(PLL_MFD_MASK, pll_denominator);
+ } else {
+ mfd = 0;
+ mfn = 0;
+ }
+
+ pll_div = readl_relaxed(pll->base + PLL_DIV);
+ mfi = FIELD_GET(PLL_MFI_MASK, pll_div);
+
+ rdiv = FIELD_GET(PLL_RDIV_MASK, pll_div);
+ odiv = FIELD_GET(PLL_ODIV_MASK, pll_div);
+
+ return clk_fracn_gppll_calc_rate(pll, mfn, mfd, mfi, rdiv, odiv, parent_rate);
+}
+
static int clk_fracn_gppll_wait_lock(struct clk_fracn_gppll *pll)
{
u32 val;
--
2.34.1
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